TFT Source/Drain Extensions via Doped Dielectric Diffusion
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Solution Overview
Problem
Existing thin film transistor (TFT) manufacturing processes face challenges in forming graded junctions, which are complex and not readily available in many technologies, leading to gate-induced drain leakage issues.
Innovation Solution
A method for forming source/drain tip extensions in TFTs involves depositing a first dielectric layer adjacent to the gate electrode with a dopant, which is then heated to diffuse into the channel region, creating electrically functional extensions, and optionally using a recessed gate dielectric layer with a lower dielectric constant material to facilitate this process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional spacer technology and graded drain junction processes are used to overcome gate induced drain leakage, then the leakage issue is addressed, but the manufacturing process becomes complex and less available in many technologies
Solution Approach 1:
The invention extracts the dopant source function from complex spacer structures and graded junction processes, concentrating it into a single doped dielectric layer positioned adjacent to the gate electrode. This layer serves as both the structural element and the dopant reservoir, eliminating the need for separate spacer formation and graded junction processing steps.
Solution Approach 2:
The dopant is pre-loaded into the dielectric layer during its formation, before the actual diffusion process. This preliminary doping preparation allows the dopant to be readily available for diffusion when heated, eliminating the need for complex in-situ doping processes or multiple processing steps to achieve graded junctions.
2Ease of manufacture
If a doped dielectric layer is used to form source/drain extensions, then the manufacturing process is simplified, but gate control over the channel region may be reduced
Solution Approach 1:
The dielectric layer is positioned locally adjacent to the gate electrode, specifically in the region where source/drain extensions are needed. The dopant diffusion is confined to this local region, creating graded junctions only where required. This localized approach maintains gate control in the channel region while achieving the desired source/drain extensions.
Solution Approach 2:
The doped dielectric layer acts as an intermediary between the gate electrode and the channel region. It provides a controlled dopant source that mediates the formation of source/drain extensions, allowing gradual dopant diffusion into the channel to create graded junctions that reduce leakage while maintaining acceptable gate control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the formation of graded junctions, reduces gate control over the channel region, and enhances the electrical properties of TFTs by forming effective source/drain extensions, thereby addressing gate-induced drain leakage issues.
Implementation Method 1
heating the resulting structure sufficiently to diffuse an amount of the dopant from the first dielectric layer into the channel region
Implementation Method 2
The undercut region can be formed, for example, by wet etching the gate dielectric layer
Implementation Method 3
forming the first dielectric layer comprises chemical vapor depositing the first dielectric layer
Data Source
AI summary
Thin film transistors (TFT) and methods for making same. The TFTs generally comprise: (a) a semiconductor layer comprising source and drain terminals and a channel region therebetween; (b) a gate electrode comprising a gate and a gate dielectric layer between the gate and the channel region; (c) a first dielectric layer adjacent to the gate electrode and in contact with the source and drain terminals, the first dielectric layer comprising a material which comprises a dopant therein; and (d) an electrically functional source/drain extensions in the channel region, adjacent to the source and drain terminals, comprising a material which comprises the same dopant as the first dielectric layer.


