TFT Drain Electrode C-Shape Reduces Parasitic Capacitance

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Solution Overview

Problem

The power consumption of liquid crystal displays is increased due to capacitance generated by the overlap between data lines and thin film transistor (TFT) channels, leading to higher current requirements and inefficiencies.

Innovation Solution

The design of the liquid crystal display includes a thin film transistor with a gate electrode, a source electrode partially overlapping the gate electrode, and a drain electrode with specific shaped end portions that minimize overlap with the data line, reducing parasitic capacitance and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If the overlap between data line and TFT channel is increased, then the capacitance is increased, but the power consumption of the liquid crystal device is increased

Engineering Contradiction:
Improvepower consumptionVSAvoidcapacitance
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent extracts and eliminates the harmful overlap between the data line and TFT channel by redesigning the electrode configuration. Specifically, the source electrode is designed to overlap the gate electrode while the data line is positioned to avoid overlapping the gate electrode, thereby removing the parasitic capacitance source while maintaining necessary electrical connections.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the spatial arrangement of electrodes from a conventional planar layout to a multi-layered configuration where the source electrode extends in one dimension to overlap the gate electrode, while the data line is positioned in a different spatial dimension (layer) to avoid overlap with the gate electrode, thus reducing parasitic capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the current magnitude of data signal is increased, then the capacitance effect is compensated, but the power consumption is increased

Engineering Contradiction:
Improvesignal transmissionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent converts the potential harm of reduced overlap (which might affect signal transmission) into a benefit by designing the source electrode to maintain necessary overlap with the gate electrode for proper transistor operation, while the data line avoidance of gate electrode overlap eliminates parasitic capacitance. This ensures reliable signal transmission without requiring increased current magnitude.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If the overlap between source electrode and gate electrode is maintained, then the transistor operation is ensured, but the data line overlap with gate electrode increases capacitance

Engineering Contradiction:
Improvetransistor operationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies different spatial configurations to different components: the source electrode is designed with local overlap with the gate electrode to ensure proper transistor operation and electrical connection, while the data line is positioned with local avoidance of the gate electrode to minimize parasitic capacitance. This localized differentiation of spatial relationships resolves the contradiction between operational reliability and energy efficiency.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9601521B2Liquid crystal display
Publication Date: 2017.03.21 SAMSUNG DISPLAY CO LTD
  • US9601521B2 patent drawing
  • US9601521B2 patent drawing
  • US9601521B2 patent drawing

AI summary

A liquid crystal display including a plurality of pixels that display an image, each pixel includes a thin film transistor that includes a gate electrode, a source electrode having a bar-shape and partially overlapping the gate electrode, and a drain electrode facing the source electrode at a location corresponding to the gate electrode, the drain electrode includes a first end portion having a C-shape that surrounds a distal end of the bar-shaped source electrode. This design eliminates an overlap between a data line and the gate electrode, which eliminates an overlap between the data line and the channel area of a semiconductor layer, which reduces a parasitic capacitor of the data line, resulting in less current to drive the data line, resulting in reduced power consumption of the display.