TFT Drain Electrode Segmentation for Parasitic Capacitance Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In large-sized organic luminescence displays, parasitic capacitance in thin film transistors (TFTs) leads to signal delays, deteriorating video quality, and existing offset structures reduce drain current due to increased source/drain series resistance.
Innovation Solution
A TFT structure is designed with a back channel formed by a drain electrode that overlaps with the active layer but not the gate electrode, reducing parasitic capacitance and series resistance, while maintaining a high drain current through the use of an oxide semiconductor and an etch stop layer with specific hole configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an offset structure is employed to reduce parasitic capacitance, then parasitic capacitance decreases, but source/drain series resistance increases causing drain current to drastically decrease
Solution Approach 1:
The drain electrode is divided into two distinct parts: a first part that overlaps with the gate electrode to maintain drain current, and a second part that is offset from the gate electrode to reduce parasitic capacitance. This segmentation allows each part to fulfill different functional requirements simultaneously.
Solution Approach 2:
Different regions of the drain electrode are assigned different spatial relationships with the gate electrode. The first part (closer to source) overlaps with the gate to ensure current flow, while the second part (closer to drain) is offset to minimize capacitance. This local differentiation optimizes both electrical performance and signal integrity.
2Reliability
If the drain electrode overlaps with the gate electrode to maintain drain current, then drain current is maintained, but parasitic capacitance increases causing signal delay
Solution Approach 1:
The drain electrode is segmented into overlapping and offset portions. The first part overlaps with the gate electrode to maintain adequate drain current, while the second part is offset to reduce parasitic capacitance and associated signal delays.
Solution Approach 2:
The solution transitions from a single uniform drain electrode configuration to a two-part structure with different spatial relationships to the gate, effectively adding a dimensional aspect to the electrode design to balance current maintenance and capacitance reduction.
3Object-affected harmful factors
If source/drain series resistance increases in offset structure, then parasitic capacitance is reduced, but video quality deteriorates due to delayed on/off times
Solution Approach 1:
By segmenting the drain electrode into overlapping and offset parts, the design reduces parasitic capacitance without creating excessive series resistance, thereby maintaining fast on/off switching times and preserving video quality.
Solution Approach 2:
The invention optimizes the geometric parameters of the drain electrode (overlap distance, offset distance, width) to achieve an optimal balance between parasitic capacitance and series resistance, ensuring both signal integrity and video quality.
Data Source
AI summary
A thin film transistor (TFT) including a substrate; a gate electrode formed over the substrate, an active layer insulated from the gate electrode by using a gate insulation film; an etch stop layer which is formed over the active layer and includes first and second holes for exposing the active layer; a first electrode; and a second electrode including a first part and a second part. The first part is formed over the etch stop layer, and the second part is received in the second hole, contacts the active layer directly, and connects the first part to the active layer. At least one portion of the first part of the second electrode overlaps with the gate electrode. The second part of the second electrode does not overlap with and is separated from the gate electrode.