TFT Electrode Capping Structure to Prevent Annealing Hillocks
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Solution Overview
Problem
Conventional display devices face challenges in uniformly forming electrodes due to their manufacturing process, leading to issues such as increased electrical resistance and hillock formation during high-temperature annealing, which affects the reliability and functionality of thin-film transistors.
Innovation Solution
The proposed solution involves a display device with a thin-film transistor structure that includes a first capping layer with a higher Young's modulus metal material covering the source and drain electrodes, and a second capping layer covering the gate electrode, both made from materials like titanium, molybdenum, or tungsten, to prevent hillock formation and improve reliability, while a simplified manufacturing process forms these layers using a single photolithography step.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional manufacturing process is used to form electrodes, then the process is simple, but electrical resistance increases and hillock formation occurs during high-temperature annealing
Solution Approach 1:
A capping layer is formed on the electrode before annealing to prevent hillock formation during the high-temperature process. This preliminary protective action ensures electrode uniformity is maintained throughout the manufacturing process, resolving the contradiction between process simplicity and manufacturing precision.
Solution Approach 2:
The capping layer acts as an intermediary between the electrode and the annealing process. It mediates the thermal stress and prevents direct interaction between the electrode material and high-temperature environment, thereby preventing hillock formation while maintaining electrical conductivity.
2Reliability
If high-temperature annealing is applied to electrodes, then electrical conductivity is improved, but hillock formation occurs
Solution Approach 1:
The capping layer is applied beforehand to cushion and distribute the thermal stress during annealing. This prevents the electrode material from forming hillocks while still allowing the beneficial electrical conductivity improvements from annealing to occur.
Solution Approach 2:
The introduction of the capping layer changes the physical parameters of the electrode structure, creating a composite system that can withstand high-temperature annealing without shape degradation, thus enabling both improved conductivity and maintained surface uniformity.
3Reliability
If multiple photolithography steps are used to form capping layers, then electrode protection is improved, but manufacturing complexity increases
Solution Approach 1:
Multiple capping layers are formed in a single photolithography step by applying the photoresist layer once and forming both capping layers simultaneously. This merging of steps maintains excellent electrode protection while significantly reducing manufacturing process complexity.
Solution Approach 2:
The single photolithography process serves multiple functions: it defines the pattern for both capping layers, applies the photoresist layer that will form both protective layers, and completes the capping structure formation all in one step, thereby reducing overall process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and functionality of thin-film transistors by reducing electrical resistance and preventing hillock formation, allowing for improved performance and simplified manufacturing processes.
Implementation Method 1
a first capping layer which covers each of the source electrode and the drain electrode, the first capping layer including a second metal material having a Young's modulus greater than that of the first metal material
Data Source
AI summary
A display device includes: a thin-film transistor on a substrate, the thin-film transistor including on the substrate: an active layer; a gate electrode overlapping the active layer; a source electrode and a drain electrode electrically connected to the active layer and including a first metal material; and a first capping layer which covers each of the source electrode and the drain electrode, the first capping layer having a Young's modulus greater than that of the first metal material.