TFT Electrode Fabrication via Damascene Process
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Solution Overview
Problem
Conventional methods for fabricating thin film transistors in TFT-LCDs are limited by the choice of materials for electrodes, leading to increased electrical resistance as devices miniaturize, affecting performance.
Innovation Solution
The method employs a damascene process to form electrodes, allowing the use of materials like copper, tungsten, chromium, or their combinations, which reduces electrical resistance through chemical-mechanical polishing, replacing the conventional photolithographic and etching process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If aluminum is used to form the metallic layer in conventional photolithographic and etching process, then the etching property matches with the liquid etchant or gaseous etchant, but the electrical resistance is higher relative to other metals
Solution Approach 1:
The patent changes the material parameter of the metallic layer from aluminum to copper, tungsten, or chromium, which have lower electrical resistance. This material substitution resolves the contradiction by selecting metals that inherently possess both good etching properties and lower electrical resistance, thereby improving electrical performance while maintaining manufacturability
Solution Approach 2:
The patent employs composite material structures where different metallic materials are used for different functional layers. By combining materials with complementary properties (e.g., copper for low resistance, tungsten for structural stability), the solution achieves both ease of manufacture through etching and improved electrical reliability
2Ease of manufacture
If conventional photolithographic and etching process is used to pattern metallic layers, then the process is well-established, but the choice of material for forming electrodes is limited
Solution Approach 1:
The patent makes the fabrication process universal by adapting the established photolithographic and etching methodology to work with multiple metallic materials (aluminum, copper, tungsten, chromium). This allows the same manufacturing process to produce electrodes with different electrical properties, thereby expanding material choice without sacrificing process maturity
Solution Approach 2:
The patent changes the material parameter while keeping the process parameters constant. By selecting from multiple metallic materials that can all be patterned using conventional photolithographic and etching processes, the solution expands material versatility while maintaining ease of manufacture through process standardization
3Area of stationary object
If device miniaturization is pursued to improve spatial utilization, then the display quality and spatial utilization improve, but the electrical resistance increases affecting performance
Solution Approach 1:
The patent changes the material parameter of the electrode from aluminum to lower-resistance metals like copper or tungsten. This material substitution compensates for the increased resistance that occurs during device miniaturization, allowing smaller device dimensions to be achieved without sacrificing electrical performance
Solution Approach 2:
The patent uses composite material strategies where low-resistance metallic materials are specifically deployed in critical current-carrying paths. This allows device miniaturization to proceed while maintaining acceptable electrical resistance through strategic material selection in miniaturized geometries
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases material choices for electrodes and improves the electrical performance of thin film transistors and liquid crystal displays by using materials with lower resistance, enhancing overall performance.
Implementation Method 1
the step of planarizing the metallic layer includes performing a chemical-mechanical polishing operation
Data Source
AI summary
A method of fabricating a thin film transistor of a thin film transistor liquid crystal display is provided. First, a patterned dielectric layer is formed over a substrate. A metallic layer is formed over the substrate to cover the patterned dielectric layer. Thereafter, the metallic layer is planarized until the patterned dielectric layer is exposed. The remained metallic layer serves as a gate. An insulating layer is formed over the patterned dielectric layer and the gate, and then a semiconductor layer is formed over the gate insulating layer above the gate. A source and a drain are formed over the semiconductor layer.