Thin Film Transistor Active Layer Protection via Etching Stopper

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Solution Overview

Problem

Conventional methods for preparing transistors using novel semiconductor materials like graphene and silicon carbide suffer from damage to the active layer due to dry etching, which is used to pattern a high concentration doped conductive layer for reducing contact resistance.

Innovation Solution

A manufacturing method for thin film transistors that involves an etching stopper layer to protect the active layer from dry etching damage, using a wet etching process for source and drain formation, and reusing the mask for a passivation layer to reduce costs and enhance transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dry etching is used to pattern the high concentration doped conductive layer, then the contact resistance between the active layer and metal layer is reduced, but the active layer of novel semiconductor materials is damaged

Engineering Contradiction:
Improvecontact resistanceVSAvoiddamage to active layer
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An etching stopper layer is introduced as an intermediary protective layer between the active layer and the ohmic contact layer film. This stopper layer is selectively removed by wet etching after the ohmic contact layer is formed, allowing the active layer to be protected during the formation process while maintaining electrical contact functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The etching stopper layer is prepared in advance before depositing the ohmic contact layer film. This preliminary protective layer is deposited over the entire surface including the active layer, ensuring protection is in place before any potentially damaging etching operations occur.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If a new mask is designed for preparing the passivation layer, then the passivation layer can be precisely patterned, but the manufacturing cost increases

Engineering Contradiction:
Improvepassivation layer patterning precisionVSAvoidmask design cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The mask prepared for the etching stopper layer is designed with a pattern that serves dual purposes: it defines the etching stopper layer pattern and simultaneously serves as the mask for patterning the passivation layer. This multi-functional mask eliminates the need for a separate mask design, reducing manufacturing costs while maintaining precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The masking steps for the etching stopper layer and passivation layer are merged into a single masking operation. The same photoresist pattern is used for both processes, combining two separate mask functions into one unified mask design and application process.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Effectively avoids damage to the active layer during dry etching, improves transistor performance by reducing contact resistance, and saves on mask design and production costs through mask reuse.

Implementation Method 1

processing the source drain conductive film by a wet etching process to form a source and a drain, which are pattered

Methodology Applied
Scientific EffectWet etching:

Implementation Method 2

processing the ohmic contact layer film by a dry etching process to form an ohmic contact layer, which is patterned

Methodology Applied
Scientific EffectDry etching:

Implementation Method 3

removing the conductive film not covered by the first photoresist pattern by wet etching and elution with an acid solution to obtain the gate, which is patterned

Methodology Applied
Scientific EffectWet etching:

Implementation Method 4

removing the etching stopper layer film not covered by the second photoresist pattern by wet etching and elution with an acid solution to obtain the etching stopper layer, which is patterned

Methodology Applied
Scientific EffectWet etching:

Data Source

PatentUS11121228B2Manufacturing method of thin film transistor
Publication Date: 2021.09.14 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US11121228B2 patent drawing
  • US11121228B2 patent drawing
  • US11121228B2 patent drawing

AI summary

Disclosed is a manufacturing method of a thin film transistor, comprising: sequentially preparing a gate, a gate insulation layer and an active layer on the substrate; preparing an etching stopper layer on the active layer; depositing an ohmic contact layer film on the etching stopper layer and the active layer, and depositing a source drain conductive film on the ohmic contact layer film; processing the source drain conductive film to form a source and a drain, which are patterned, and processing the ohmic contact layer film by a dry etching process to form an ohmic contact layer, which is patterned; removing the etching stopper layer after preparing the ohmic contact layer. Since the etching stopper layer is disposed above the channel of the transistor before preparing the ohmic contact layer, the damage to the active layer by dry etching can be effectively avoided to improve the performance of the transistor.