Thin Film Transistor Fabrication Preventing Source Drain Oxidation

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Solution Overview

Problem

In the fabrication of thin film transistors, the source and drain metal layers are prone to oxidation, which degrades the performance of the transistors due to the use of half tone masks and subsequent plasma treatments.

Innovation Solution

A method is introduced where a single patterning process forms the active layer pattern and source-drain metal layer, followed by a first insulation layer, allowing the source and drain patterns to be formed without exposing them to oxidation, using a mask with only all-exposed and all-shielded areas to avoid half tone mask processes and plasma treatments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If half tone mask process and plasma treatment are used to form source and drain patterns, then the transistor performance can be improved, but the source and drain metal layers are prone to oxidation which degrades the transistor performance

Engineering Contradiction:
Improvesource and drain pattern formation precisionVSAvoidsource and drain oxidation resistance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The source and drain metal layers are formed in advance before the active layer pattern, and the first insulation layer is formed to cover and protect them. This preliminary formation and protection prevents oxidation exposure that would occur in conventional processes where plasma treatment is applied later.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The first insulation layer serves as an intermediary protective barrier between the source and drain metal layers and the oxidizing environment. It is formed to cover the metal layers, preventing direct exposure to oxygen and plasma that would cause oxidation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If multiple masks including half tone masks are used in the fabrication process, then the pattern formation can be achieved, but the fabrication process complexity and costs increase

Engineering Contradiction:
Improvepattern formation capabilityVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The formation of the active layer pattern and the source-drain metal layer pattern is merged into a single patterning step. This is achieved by forming the source and drain metal layers first, then using one mask to define both the active layer and source-drain patterns simultaneously, eliminating the need for separate half tone mask processes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The source and drain metal layers are formed preliminarily before the active layer pattern, allowing both to be defined in one patterning step. This preliminary positioning enables pattern merging and reduces the total number of masks required in the fabrication process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10714512B2Thin film transistor, method for fabricating the same, and display device
Publication Date: 2020.07.14 BOE TECHNOLOGY GROUP CO LTD
  • US10714512B2 patent drawing
  • US10714512B2 patent drawing
  • US10714512B2 patent drawing

AI summary

The disclosure discloses a thin film transistor, a method for fabricating the same, and a display device so as to avoid a source and a drain from being oxidized while the thin film transistor is being fabricated, to thereby improve the performance of the thin film transistor. The method for fabricating a thin film transistor includes: forming an active layer pattern on a base substrate, and a source-drain metal layer located above the active layer pattern and with a same pattern as the active layer pattern, using one patterning process; forming a first insulation layer above the source-drain metal layer; and patterning the source-drain metal layer and the first insulation layer using one patterning process so that portion of the active layer pattern corresponding to a channel area is exposed to form a source pattern and a drain pattern.