TFT Array Substrate Fanout Impedance Control
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Solution Overview
Problem
Existing LCD devices face impedance variations in fanout lines due to increasing dimensions, leading to uneven signal arrival times and manufacturing challenges like short circuits, which affect display quality.
Innovation Solution
A TFT array substrate design with multiple metallic layers and vias to connect data and fanout lines, ensuring consistent impedance across fanout lines by using layers with different surface resistivities, thereby stabilizing signal input.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If detours are added to fanout lines to uniform lengths and impedances, then impedance uniformity is improved, but exposure anomaly occurs during lithography causing short circuits
Solution Approach 1:
The patent transitions from a single-plane fanout line design to a multi-layer structure where fanout lines are distributed across different metallic layers. This dimensional change allows impedance control without requiring detours in the same plane, thereby avoiding lithography exposure anomalies and short circuit risks while maintaining impedance uniformity.
Solution Approach 2:
The patent segments the fanout lines into multiple sections located on different metallic layers. Each layer contains specific fanout lines that are electrically connected through vias, creating a segmented architecture that achieves impedance control without requiring complex detour patterns on any single layer.
2Area of stationary object
If LCD device dimensions are increased, then display area is improved, but impedance variation in fanout lines increases
Solution Approach 1:
By distributing fanout lines across multiple metallic layers, the patent effectively manages impedance control in large-area displays. The multi-layer architecture allows for better impedance matching and signal integrity even as the overall device dimensions increase, preventing the impedance variation that would otherwise occur in single-plane designs.
3Device complexity
If single metallic layer is used, then device complexity is reduced, but impedance control precision is insufficient
Solution Approach 1:
The patent segments the metallic structure into multiple layers, with each layer containing specific fanout lines that are strategically positioned and electrically connected. This segmentation enables precise impedance control for different signal paths while maintaining a relatively simple overall structure that is manufacturable with standard processes.
Data Source
AI summary
The present invention teaches a TFT array substrate and a display device. The TFT array substrate disposes second fanout lines of the fanout area on a first metallic layer, and disposes first fanout lines of the fanout area on a second metallic layer. Data lines and their corresponding second fanout lines, and second fanout lines and their corresponding first fanout lines, are connected together through vias. The first metallic layer has a greater surface resistivity than that of the second metallic layer. The present invention's fanout lines corresponding to a same data line have a significantly increased total impedance, and the impedance variation of the fanout lines has a less impact. As data signals propagate to the data lines through the fanout lines, the data signals' arrival times to the data lines have little difference, thereby enhancing the display quality, more reliable manufacturing process, and lower risk for short circuit.