Thin-Film Transistor Electrode Insulation at the Gate Edge

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Solution Overview

Problem

Current thin film transistors face issues with electrostatic accumulation and breakage at the boundary between the gate and active layers, leading to short circuits and device failure due to the thickness of the gate and presence of impurities.

Innovation Solution

Incorporating a first and second insulating portion between the gate insulating layer and the electrodes, which overlap with the boundary between the gate's side and upper surfaces, to prevent short circuits by filling grooves in the active layer and using an etch barrier layer with the same material for the insulating portions to simplify the manufacturing process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate is made thicker to improve gate control capability, then the gate control capability is improved, but electrostatic accumulation and breakage occur at the boundary between gate and active layers leading to short circuits

Engineering Contradiction:
Improvegate control capabilityVSAvoidelectrostatic accumulation and breakage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An insulating portion is introduced as an intermediary layer between the gate insulating layer and the source/drain electrodes, specifically positioned to overlap with the gate boundary region. This insulating portion acts as a mediator that prevents direct electrical contact and eliminates the short circuit path caused by electrostatic accumulation at the gate boundary, while allowing the gate to maintain its thicker structure for improved control capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate insulating layer is segmented by introducing a discrete insulating portion at the gate boundary region. This segmentation isolates the problematic boundary area from the source/drain electrodes, preventing the propagation of electrostatic damage while maintaining the overall gate structure integrity and control function.

Inventive Principle:
Principle #1Segmentation

2Reliability

If insulating portions are added to prevent short circuits, then reliability is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveshort circuit preventionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The insulating portion is formed by combining the etch barrier layer material with the insulating function. The same material layer serves dual purposes: as an etch barrier during active layer patterning and as the insulating portion preventing short circuits. This merging of functions eliminates the need for separate insulating layer deposition and patterning processes, thereby reducing manufacturing complexity while maintaining reliability improvement.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The etch barrier layer is given multi-functionality by serving both as an etch protection layer during active layer formation and as the insulating portion that prevents short circuits between the gate insulating layer and source/drain electrodes. This universal application of a single material layer simplifies the overall manufacturing process while achieving multiple protective functions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11784258B2Thin film transistor with insulating portion between source/drian electrode and gate insulating layer, and manufacturing method thereof
Publication Date: 2023.10.10 BOE TECHNOLOGY GROUP CO LTD
  • US11784258B2 patent drawing
  • US11784258B2 patent drawing
  • US11784258B2 patent drawing

AI summary

A thin film transistor, a manufacturing method thereof, an array substrate, and a display device are provided. The thin film transistor comprises a base substrate, a gate on the base substrate, a gate insulating layer covering the gate, an active layer on the gate insulating layer, a first electrode and a second electrode over and electrically connected to the active layer, and a first insulating portion between the gate insulating layer and the first electrode. An orthographic projection of the first insulating portion on the base substrate, an orthographic projection of the first electrode on the base substrate, and an orthographic projection of a boundary between a side surface of the gate and an upper surface of the gate on the base substrate at least partially overlap.