TFT Gate Electrode Thickness Control for Stress Management
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Solution Overview
Problem
Thin film transistors (TFTs) with laminated structures experience film peeling at interfaces due to differences in in-film stresses between the gate electrode, gate insulating film, and active layer, and the resistance value of the wiring layer is increased when formed with the same material as the gate electrode.
Innovation Solution
The TFTs are designed with a gate electrode thinner than the wiring layer, and at least part of the constituent material differs between the gate electrode and the wiring layer, allowing control of electric resistance and in-film stress to prevent film peeling and maintain low resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate electrode and wiring layer are formed with the same material and thickness, then the manufacturing process is simplified, but the resistance value of the wiring layer is increased
Solution Approach 1:
The patent applies local quality by making the gate electrode and wiring layer different in thickness (gate electrode is thinner) and/or different in material composition, so that each layer has optimized properties for its specific function: the gate electrode provides sufficient conductivity while the wiring layer provides low resistance for signal transmission
2Ease of manufacture
If the gate electrode has the same thickness as the wiring layer, then the manufacturing process is simplified, but film peeling occurs at interfaces due to in-film stress differences
Solution Approach 1:
The patent makes the gate electrode thinner than the wiring layer to create different stress characteristics in each layer, which compensates for the inherent stress differences between the gate electrode, gate insulating film, and active layer, thereby preventing film peeling at interfaces
Solution Approach 2:
The patent changes the thickness parameter of the gate electrode relative to the wiring layer, making the gate electrode intentionally thinner to control and balance the in-film stresses across the laminated structure, preventing interface delamination
Data Source
AI summary
Disclosed herein is a display device including: a thin film transistor; and a wiring layer; wherein the thin film transistor includes a semiconductor layer, a gate electrode disposed so as to be opposed to the semiconductor layer, the gate electrode being different in thickness from the wiring layer, and a gate insulating film between the semiconductor layer and the gate electrode.