TFT Gate Layer Geometry for Stronger ESD Resistance
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Solution Overview
Problem
Electrostatic discharge (ESD) causes damage to thin-film transistors (TFTs) in display technology, leading to component failure, which is difficult to detect and results in a shortened lifespan, with existing methods failing to effectively prevent such damage.
Innovation Solution
A method involving data acquisition and fitting to determine the relationship between manufacturing parameters, such as ramp angle and gate insulating layer thickness, to enhance ESD resistance, where a smaller ramp angle and thicker inorganic gate insulating layer improve ESD resistance, allowing for the prevention of ESD-induced defects in TFTs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional manufacturing methods are used for TFT, then production efficiency is maintained, but ESD resistance is insufficient causing component damage
Solution Approach 1:
The patent applies parameter changes by optimizing the ramp angle of the gate layer (reducing it to 0°-40°) and adjusting the thickness of the gate insulating layer. These parameter modifications directly improve ESD resistance without fundamentally changing the manufacturing process, thus resolving the contradiction between reliability and ease of manufacture
Solution Approach 2:
The patent employs composite material structures by combining the gate layer with a gate insulating layer made of inorganic materials. This composite structure enhances ESD resistance through the synergistic properties of different materials, achieving improved reliability while maintaining conventional manufacturing approaches
2Duration of action of stationary object
If ESD protection measures are implemented, then component lifespan is extended, but detection difficulty of potential defects increases
Solution Approach 1:
The patent implements preliminary action by establishing ESD protection through optimized manufacturing parameters (ramp angle and insulating layer thickness) before the TFT enters service. This preventive approach extends service life while avoiding the need for complex post-manufacturing detection systems, as the protection is built-in from the start
Data Source
AI summary
The present application provides a method of preventing thin film transistor (TFT) from electrostatic discharge (ESD) damaging, a method of manufacturing a TFT, and a display panel. By fitting a test data, acquiring relationships between an anti-ESD capability of the TFT and manufacturing parameters of each film layer, according to above-mentioned relationships, disposing the manufacturing parameters of each film layer of the TFT, to prevent the TFT from ESD damaging.