Thin-Film Transistor Gate Insulator Structure for Bending Durability

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Solution Overview

Problem

Existing thin film transistors with organic polymer and inorganic silicon compound gate insulating layers do not adequately address the electrical durability against bending of flexible substrates, as the relative permittivity and dielectric property values do not directly correlate with the electrical durability against bending, leading to potential deterioration and decreased mobility.

Innovation Solution

A thin film transistor design featuring a gate insulating layer composed of a first organic polymer or organic-inorganic composite coating and a second inorganic silicon compound coating, with specific thickness and Young's modulus ranges for each layer, ensuring electrical durability against bending by preventing cracking and maintaining adhesion at the interface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the dielectric property value is controlled to improve adhesion between layers, then the layer adhesion is improved, but the electrical durability against bending deteriorates

Engineering Contradiction:
Improveadhesion between layersVSAvoidelectrical durability against bending
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The invention applies local quality by assigning different functional characteristics to different layers of the gate insulating structure. The organic polymer compound layer (100-1500 nm thick) provides flexibility and adhesion to the substrate, while the inorganic silicon compound layer (2-30 nm thick) provides electrical stability and withstand voltage. This localized functional differentiation ensures both good layer adhesion and high electrical durability against bending simultaneously.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4310921B1Thin film transistor and method for producing thin film transistor
Publication Date: 2025.06.25 TOPPAN INC
  • EP4310921B1 patent drawingFigure 1~2
  • EP4310921B1 patent drawingFigure 3
  • EP4310921B1 patent drawingFigure 4

AI summary

A gate insulating layer of a thin film transistor includes a first gate insulating coating made of an organic polymer compound or an organic-inorganic composite material, and a second gate insulating coating made of one selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, and aluminum oxide. The second gate insulating coating is sandwiched between the first gate insulating coating and a semiconductor layer. The first gate insulating coating has a thickness of 100 nm or greater and 1500 nm or less, and a product of the thickness and Young's modulus of the first gate insulating coating is 300 nm·GPa or greater and 30000 nm·GPa or less. The second gate insulating coating has a thickness of 2 nm or greater and 30 nm or less, and a product of the thickness and Young's modulus of the second gate insulating coating is 100 nm·GPa or greater and 9000 nm·GPa or less.