Thin-Film Transistor Gate Insulator for Higher Current in Compact Displays
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Solution Overview
Problem
Current thin film transistors have a low current capacity, which is inadequate for meeting the functional requirements of display devices, especially as bezel sizes are reduced and TFT sizes are compressed.
Innovation Solution
A thin film transistor design featuring a double-layered gate insulating layer with a higher dielectric constant, where the first gate insulating layer is made of hafnium oxide or aluminum oxide and the second layer is made of silicon oxide, improving current conduction capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the size of TFT is reduced to achieve narrow bezel design, then the screen-to-body ratio is improved, but the current conduction capacity of TFT deteriorates
Solution Approach 1:
The patent changes the dielectric constant parameter of the gate insulating layer by using high-k materials (hafnium oxide or aluminum oxide) instead of conventional low-k materials. This parameter change allows the TFT to maintain higher current conduction capacity despite size reduction, as the enhanced dielectric constant increases the gate's ability to induce channel current.
Solution Approach 2:
The patent employs composite material structure in the gate insulating layer, combining high-k dielectric materials (hafnium oxide or aluminum oxide) with conventional materials (silicon oxide) in a layered configuration. This composite approach optimizes both the dielectric constant for current conduction and the insulating properties, enabling improved performance in compact TFT designs.
2Power
If the dielectric constant of gate insulating layer is increased to improve current capacity, then the current conduction capability is improved, but the device complexity increases
Solution Approach 1:
The patent segments the gate insulating layer into multiple functional layers: a first gate insulating layer (1051) adjacent to the semiconductor layer made of high-k material for current conduction enhancement, and a second gate insulating layer (1052) adjacent to the gate electrode made of conventional material for stable insulation. This segmentation allows each layer to perform its specific function optimally without requiring the entire structure to be complex.
Solution Approach 2:
The patent applies local quality by assigning different dielectric properties to different regions of the gate insulating layer. The first gate insulating layer uses high-k material locally where current conduction is critical, while the second gate insulating layer uses conventional material where stable insulation is prioritized. This localized material selection optimizes performance without uniformly increasing complexity throughout the entire device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the current capacity of the thin film transistor, allowing for a larger current to be conducted under the same size and driving conditions, enabling a smaller size design while maintaining performance.
Implementation Method 1
a dielectric constant of the first gate insulating layer is greater than a dielectric constant of the second gate insulating layer
Data Source
AI summary
A thin film transistor, a manufacturing method thereof, and a display panel are provided. The thin film transistor includes a semiconductor layer, a gate disposed corresponding to a position of the semiconductor layer, and a gate insulating layer disposed between the semiconductor layer and the gate. The gate insulating layer includes a first gate insulating layer and a second gate insulating layer. A dielectric constant of the first gate insulating layer is greater than a dielectric constant of the second gate insulating layer.