TFT Substrate Gate Insulator Thickness Variation for Plasma Damage
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Solution Overview
Problem
Thin-film transistor (TFT) substrates with oxide semiconductor layers face issues such as plasma damage during dry etching, leading to degraded TFT properties, unstable threshold values, and increased off-leakage current, which affect the reliability and sensitivity of liquid crystal display devices, particularly in X-ray sensors.
Innovation Solution
A TFT substrate structure is developed with a gate electrode, gate insulating layer, and an oxide semiconductor layer, where the source and drain electrodes include a conductive layer with elements like molybdenum, tantalum, or nickel, and an etching stopper layer is used to prevent plasma damage, ensuring stable TFT properties by modifying the gate insulating layer surface before forming the oxide semiconductor layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dry etching is used to form source/drain electrodes, then low resistance is achieved, but plasma damage occurs causing degraded TFT properties
Solution Approach 1:
An etching stopper layer is introduced as an intermediary between the gate insulating layer and the source/drain electrodes. This stopper layer protects the gate insulating layer surface from plasma damage during dry etching of the source/drain electrodes, while allowing the etching process to proceed effectively. The stopper layer acts as a buffer that absorbs the harmful plasma effects without compromising the low resistance achievement of the source/drain electrodes.
Solution Approach 2:
The etching stopper layer is formed in advance before the dry etching process of the source/drain electrodes. This preliminary action prepares the surface to resist plasma damage before the harmful etching process begins, preventing threshold value shifts and maintaining stable TFT properties throughout the subsequent low resistance electrode formation.
2Manufacturing precision
If plasma treatment is performed by etching the gate insulating layer, then surface preparation is achieved, but channel length variation occurs causing TFT property instability
Solution Approach 1:
The etching stopper layer serves as a mediator that enables surface preparation without direct etching of the gate insulating layer. By etching the stopper layer instead, the gate insulating layer surface remains intact and uniform, preventing channel length variation while still achieving the necessary surface preparation for stable TFT properties.
Solution Approach 2:
The function of surface preparation is separated from the gate insulating layer and assigned to the etching stopper layer. This segmentation allows the gate insulating layer to maintain its structural integrity and uniform thickness, while the stopper layer absorbs the etching process that would otherwise cause channel length variation.
3Manufacturing precision
If plasma treatment is performed by asking treatment, then surface activation is achieved, but source/drain layer oxidation occurs causing poor contact
Solution Approach 1:
The etching stopper layer acts as a protective intermediary during plasma treatment. It allows surface activation of the gate insulating layer for good semiconductor layer formation while preventing direct plasma exposure to the source/drain layer, thereby avoiding oxidation and maintaining good electrical contact.
Data Source
AI summary
The present invention provides a thin-film transistor substrate including a base substrate and a thin-film transistor, the thin-film transistor including: a gate electrode; a gate insulating layer; a source electrode and a drain electrode; and an oxide semiconductor layer in this order. The source electrode and the drain electrode each include a first conductive layer and a second conductive layer covering the first conductive layer. The second conductive layer contains at least one element selected from the group consisting of molybdenum, tantalum, tungsten, and nickel. The gate insulating layer in a region between the source electrode and the drain electrode has a smaller thickness than in a region below the source electrode and in a region below the drain electrode.