Thin Film Transistor Gate Interconnection Joule Heating
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Solution Overview
Problem
Current annealing methods for crystallization, such as laser and rapid thermal annealing, face limitations in uniformity and cost, especially when high-temperature or high-rate annealing is required for large silicon wafers, leading to non-uniformity and arc formation during the process.
Innovation Solution
A thin film transistor (TFT) manufacturing method that includes a substrate with a metal pattern directly connected to the gate interconnection, using an electric field to generate Joule heat and crystallize the semiconductor layer, preventing arc formation and improving uniformity through controlled heat transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If laser annealing method is used to rapidly anneal a surface of a material, then heating rate is improved, but uniformity of annealing temperature deteriorates and equipment cost increases
Solution Approach 1:
A metal layer is introduced as an intermediary between the light source and the semiconductor layer. The metal layer absorbs light energy and converts it to heat through Joule heating, which then diffuses to the semiconductor layer. This intermediary approach enables rapid heating while maintaining uniform temperature distribution, as the metal layer acts as a heat buffer that smooths out temperature variations.
Solution Approach 2:
The patent replaces direct optical heating (laser annealing) with an electrical heating mechanism. Instead of using laser beams to directly heat the semiconductor layer, an electric field is applied to the metal layer to generate Joule heat, which then transfers to the semiconductor layer. This substitution maintains high heating rates while improving temperature uniformity.
2Manufacturing precision
If RTA method is used for heat treatment, then manufacturing precision is improved, but applicability to large silicon wafers deteriorates and heating rate is limited
Solution Approach 1:
The patent replaces the thermal radiation-based RTA method with an electrical field-based Joule heating mechanism. The metal layer, when subjected to an electric field, generates heat throughout its volume, enabling uniform heating of large-area silicon wafers without the limitations of radiant heat transfer. This allows scaling to larger wafer sizes while maintaining temperature uniformity.
Solution Approach 2:
The patent changes the fundamental heating parameter from radiant heat flux (RTA) to electrical current density (Joule heating). This parameter change enables proportional scaling with area, as the total power input can be increased linearly with wafer size while maintaining the same power density and temperature distribution characteristics.
3Productivity
If Joule heating annealing method is used to rapidly anneal a local region, then productivity is improved, but arc formation occurs during crystallization
Solution Approach 1:
The metal layer serves as a protective intermediary between the electric field and the semiconductor layer. By confining the electric field application to the metal layer, the system achieves rapid Joule heating without direct electrical contact with the semiconductor material, thereby preventing arc formation while maintaining high heating rates for rapid crystallization.
Solution Approach 2:
The metal layer acts as a cushioning layer that prevents direct electrical discharge into the semiconductor layer. The high electrical conductivity and thermal conductivity of the metal layer absorb and distribute the electrical energy before it can reach the semiconductor material, preventing harmful arc formation while still enabling rapid heating through Joule effect.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively prevents arc formation and reduces defects during crystallization, enabling higher production yields and more efficient annealing of larger silicon wafers with improved uniformity and reduced maintenance costs.
Implementation Method 1
applying an electric field to the metal layer to crystallize the semiconductor layer pattern
Implementation Method 2
controlled heat transfer
Data Source
AI summary
A thin film transistor for an organic light emitting diode includes a substrate including a pixel portion and an interconnection portion, a buffer layer on the substrate, a gate electrode and a gate interconnection on the buffer layer, wherein the gate electrode is located at the pixel portion and the gate interconnection is located at the interconnection portion, a gate insulating layer on the substrate, a semiconductor layer on the gate electrode, source and drain electrodes electrically connected to the semiconductor layer, and a metal pattern on the gate interconnection.