Thin Film Transistor Gate Protrusions for ON Current

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Solution Overview

Problem

Prior art thin film transistors (TFTs) have low ON current, low opening ratio, and high ON voltage due to the gate electrode only influencing the channel from the bottom, resulting in inefficient current flow and poor performance.

Innovation Solution

The introduction of gate electrode protrusions on both sides of the channel, covered by the gate insulating layer, creates multiple current paths, enhancing the ON current and reducing capacitance, allowing for a smaller TFT design with improved opening ratio and lower ON voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the gate electrode is located at the bottom of the channel influencing the channel only from the bottom, then the structure is simple, but the ON current is low and the opening ratio is low

Engineering Contradiction:
Improvestructure simplicityVSAvoidON current
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The gate electrode is extended to form protrusions that reach the both sides of the channel in the width direction, transforming the gate structure from a single-plane configuration to a multi-dimensional configuration. This allows the gate electrode to influence the channel from multiple directions (bottom and sides), thereby increasing the effective gate control area and enhancing the ON current without significantly complicating the overall device structure.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If the gate electrode is located at the bottom of the channel influencing the channel only from the bottom, then the manufacturing process is simple, but the opening ratio is low

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidopening ratio
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The gate electrode protrusions extend to the both sides of the channel, utilizing the width direction dimension to increase the effective gate control area. This dimensional extension allows for a larger opening ratio within the same device footprint, as the gate structure now occupies space more efficiently in three dimensions rather than being confined to a single plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If the gate electrode influences the channel only from the bottom, then the capacitance is high, but the structure is simple

Engineering Contradiction:
Improvestructure simplicityVSAvoidcapacitance
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

By extending the gate electrode to form protrusions at both sides of the channel, the gate control is distributed across multiple spatial locations. This multi-point control reduces the concentration of electric field lines and decreases the overall capacitance between the gate and channel, leading to lower power consumption and improved device efficiency while maintaining structural simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9123813B2Thin film transistor, array substrate and display device
Publication Date: 2015.09.01 BOE TECHNOLOGY GROUP CO LTD
  • US9123813B2 patent drawing
  • US9123813B2 patent drawing
  • US9123813B2 patent drawing

AI summary

A thin film transistor, an array substrate including the thin film transistor and a display device. The thin film transistor includes: a gate electrode (100), a gate insulating layer (200), an active layer (300) and a source/drain layer (400) that are successively stacked. The source/drain layer (400) comprises a source electrode (401) and a drain electrode (402) with a gap therebetween, and the active layer (300) forms a channel (301) in a region corresponding to the gap. The gate electrode (100) has a gate electrode protrusion (101) on at least one side of the channel (301) in its width direction; and the gate insulating layer (200) covers the gate electrode (100) and the gate electrode protrusion (101).