TFT Substrate Etching via Recessed Gate Protection
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Solution Overview
Problem
Existing methods for manufacturing TFT substrates face challenges in protecting thin film transistors, including isotropic etching with wet-etching and surface contamination when forming SiO2 and SiN layers, and inefficient dry etching that affects source and drain regions.
Innovation Solution
A manufacturing method involving the formation of gate electrodes, insulation layers, and contact holes with recessed portions above the gate electrodes, using dry etching to reduce influence on source and drain regions, and stacking different materials for the second insulation layer to prevent contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wet-etching method is adopted to etch insulation layers, then etching can be performed, but side etching occurs and manufacturing precision deteriorates
Solution Approach 1:
The patent replaces wet-etching (chemical isotropic etching) with dry-etching (physical anisotropic etching using plasma). This substitution eliminates side etching by enabling directional removal of material only at the bottom of contact holes, while preserving the ability to effectively etch through insulation layers.
Solution Approach 2:
The patent changes the etching method from wet to dry, fundamentally altering the etching parameters from isotropic chemical reaction to anisotropic physical sputtering. This parameter change allows vertical etching without lateral erosion, solving the side etching problem while maintaining etching effectiveness.
2Manufacturing precision
If dry-etching method is adopted to etch insulation layers, then side etching is reduced, but source and drain regions are etched before gate is completed
Solution Approach 1:
The patent divides the etching process into two distinct stages: first etching contact holes through the second insulation layer to reach source/drain regions, then etching second contact holes through both insulation layers to reach the gate. This segmentation allows selective etching at different depths without damaging unprotected regions.
Solution Approach 2:
The patent performs preliminary formation of the second insulation layer covering source and drain regions before etching contact holes. This preliminary protective action ensures that when dry-etching is performed, the source and drain regions are already protected by the insulation layer, preventing premature etching damage.
3Productivity
If SiO2 layer and SiN layer are formed continuously and etched continuously, then manufacturing efficiency is improved, but surface contamination occurs
Solution Approach 1:
The patent extracts the problematic continuous etching step by introducing an intermediate stage where the second insulation layer is formed completely before any etching occurs. This separation removes the contamination source from the manufacturing process while maintaining continuous film formation efficiency.
Solution Approach 2:
The patent performs preliminary formation of the complete second insulation layer (both SiO2 and SiN layers) before performing any etching operations. This preliminary action prevents contamination by ensuring that etching residues do not contaminate freshly formed layer surfaces, while still maintaining manufacturing efficiency through continuous film deposition.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the reliability of display devices by minimizing side etching and surface contamination, ensuring precise formation of contact holes and line layers without affecting the source and drain regions, and maintaining the integrity of the insulation layers.
Implementation Method 1
the first contact holes and the recessed portions are formed by dry etching and hence, side etching does not occur
Implementation Method 2
forming a second insulation layer which is formed by stacking a plurality of layers made of different materials from each other
Implementation Method 3
the step of forming the second insulation layer may include a step of forming a silicon oxide film and a step of forming a silicon nitride film
Data Source
AI summary
A second insulation layer which is formed by stacking a plurality of layers made of different materials in a mutually contact manner is formed such that the second insulation layer covers a source region and a drain region and also covers a gate electrode from above. A first contact hole which reaches one of the source region and the drain region and a recessed portion which is arranged above the gate electrode but is not communicated with the gate electrode are simultaneously formed on the second insulation layer by dry etching. A first line layer is formed so as to cover the first contact hole. After forming the first line layer, a bottom surface of the recessed portion is etched by dry etching thus forming a second contact hole which reaches the gate electrode in the first and second insulation layers. A second line layer is formed on the second contact hole.