Thin Film Transistor Gate Segmentation for Display Transmittance
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Solution Overview
Problem
In thin film transistor devices, wide gates reduce transmittance and increase parasitic capacitance, affecting display performance.
Innovation Solution
The structure of the gate is modified by adding reinforcing portions on the flat film to increase the effective overlapping area with the active layer, reducing the width and length of the transistor and parasitic capacitance, while maintaining conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate width is increased to improve control over the active layer, then the conductivity control is improved, but the transmittance of the display panel is reduced and the parasitic capacitance is increased
Solution Approach 1:
The gate is segmented into a flat film gate and multiple reinforcing portions (columns, strips, or mesh structures). This segmentation allows the gate to maintain effective control area while reducing the overall footprint and light-blocking area, thereby improving transmittance without sacrificing conductivity control.
Solution Approach 2:
The gate structure transitions from a two-dimensional planar film to a three-dimensional structure by adding reinforcing portions that extend vertically. This dimensional change increases the effective overlapping area with the active layer for better control while minimizing the lateral footprint to maintain high transmittance.
2Reliability
If the gate width is increased to improve control over the active layer, then the conductivity control is improved, but the parasitic capacitance is increased
Solution Approach 1:
The gate is divided into a flat film component and separate reinforcing portions. This segmentation allows optimization of each component's function - the flat film provides baseline control while the reinforcing portions provide localized enhancement with minimal capacitance contribution due to their reduced lateral dimensions.
Solution Approach 2:
The reinforcing portions are strategically positioned at specific locations (edges or centers) of the active layer where enhanced control is most needed. This local quality approach concentrates control effectiveness where required while minimizing overall parasitic capacitance by avoiding uniform gate width increase across the entire active layer.
3Illumination intensity
If the area of the flat film is reduced to increase transmittance, then the transmittance is improved, but the effective overlapping area with the active layer is reduced
Solution Approach 1:
The gate structure utilizes the vertical dimension by adding reinforcing portions that extend upward from the flat film. This allows the effective overlapping area (which determines control effectiveness) to be increased through vertical height rather than lateral area, thereby maintaining high transmittance while achieving sufficient control area.
Solution Approach 2:
The gate is formed as a composite structure combining a flat film base layer with reinforcing portion additions. This composite approach allows the flat film area to be minimized for transmittance while the reinforcing portions contribute to the effective overlapping area through their vertical presence and strategic positioning.
Data Source
AI summary
The invention discloses a thin film transistor, a display panel and a method of fabricating the thin film transistor. The thin film transistor includes a substrate, a flat film, a dielectric layer, an active layer, and a source/drain layer which are stacked in sequence from bottom to top; and a plurality of reinforcing portions are disposed on an upper surface of the flat film, wherein the flat film and the reinforcing portions constitute a gate layer, wherein the reinforcing portions are configured to increase an area of the upper surface of the flat film, so as to increase an effective overlapping area between the flat film and the active layer, and reduce a width and a length of the thin film transistor.