Thin Film Transistor Gate Electrode Thickness for Stable Crystallization

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Solution Overview

Problem

The formation of unstable crystal growth regions in polycrystalline silicon semiconductor layers during the crystallization process for thin film transistors, leading to deteriorated driving characteristics and reliability in display devices.

Innovation Solution

A thin film transistor with a polycrystalline silicon semiconductor layer formed using sequential lateral solidification (SLS) with specific gate electrode and gate insulating layer thicknesses, and primary grain boundary distances to prevent unstable crystal growth, ensuring stable crystallization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a laser beam is irradiated on the a-Si layer to crystallize it into a poly-Si layer, then the semiconductor layer can be formed with higher electron mobility, but heat flows toward the gate electrode causing insufficient crystal growth and unstable crystal growth regions

Engineering Contradiction:
Improvecrystal growth stabilityVSAvoidheat flow to gate electrode
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

A buffer layer is introduced between the gate electrode and the a-Si layer to act as a thermal barrier. This intermediary layer prevents excessive heat from the laser beam from flowing into the gate electrode during the crystallization process, thereby eliminating unstable crystal growth regions while maintaining the desired electron mobility in the poly-Si layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The thickness of the gate electrode is controlled within a specific range (500-1500 Å) to optimize the balance between electrical performance and thermal management. By adjusting this parameter, the gate electrode can withstand the thermal load during laser irradiation without causing insufficient crystal growth, thus resolving the contradiction between achieving high electron mobility and preventing heat-induced crystal growth instability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the gate electrode thickness is increased to improve electrical performance, then current control capability is enhanced, but heat flow during crystallization increases causing unstable crystal growth regions

Engineering Contradiction:
Improvedriving characteristicsVSAvoidheat flow to gate electrode
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The gate electrode thickness is optimized to a specific range (500-1500 Å) that simultaneously satisfies electrical performance requirements and thermal management needs. This parameter optimization ensures adequate current control capability while limiting heat absorption during laser irradiation, thereby preventing unstable crystal growth regions and improving overall device reliability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The buffer layer serves as a thermal intermediary that decouples the thermal relationship between the gate electrode and the a-Si layer. This allows the gate electrode to be designed with sufficient thickness for electrical performance without directly experiencing the full thermal load during crystallization, thus eliminating the harmful heat flow effect.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the gate insulating layer thickness is increased to improve electrical isolation, then leakage current is reduced, but the distance for heat dissipation increases causing insufficient crystal growth

Engineering Contradiction:
Improveelectrical isolationVSAvoidheat dissipation distance
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The gate insulating layer thickness is optimized to a specific range that provides adequate electrical isolation while maintaining sufficient thermal coupling for crystal growth. By controlling this parameter, the design achieves low leakage current through improved electrical isolation while ensuring that heat from the laser beam can still effectively reach the a-Si layer for complete crystallization.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution prevents the formation of unstable crystal growth regions, enhancing the reliability and driving characteristics of thin film transistors by maintaining the gate electrode thickness between 500 Å to 1500 Å and the gate insulating layer thickness between 1600 Å to 2500 Å, and optimizing the distance between primary grain boundaries to 2.75 μm to 3 μm.

Implementation Method 1

the heat source of a laser beam, which is irradiated on the a-Si layer, may cause heat to flow toward the gate electrode

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Implementation Method 2

crystallizing the a-Si layer into a poly-Si layer using a crystallization process, e.g., solid phase crystallization (SPC), rapid thermal annealing (RTA), metal-induced crystallization (MIC), metal-induced lateral crystallization (MILC), excimer laser annealing (ELA), or sequential lateral solidification (SLS)

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Implementation Method 3

the heat source of a laser beam, which is irradiated on the a-Si layer

Methodology Applied
Scientific EffectLaser heating: Laser

Data Source

PatentUS8785910B2Thin film transistor, display device including the same, and method of manufacturing the display device
Publication Date: 2014.07.22 SAMSUNG DISPLAY CO LTD
  • US8785910B2 patent drawing
  • US8785910B2 patent drawing
  • US8785910B2 patent drawing

AI summary

A thin film transistor, a display device including the same, and a method of manufacturing the display device, the thin film transistor including a substrate; a gate electrode on the substrate; a gate insulating layer on the gate electrode; a semiconductor layer on the gate insulating layer; and source/drain electrodes electrically connected with the semiconductor layer, wherein the gate electrode has a thickness of about 500 Å to about 1500 Å and the gate insulating layer has a thickness of about 1600 Å to about 2500 Å.