Thin-Film Transistor Gate Insulator Recesses for Higher Carrier Mobility
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Solution Overview
Problem
Existing thin film transistors face challenges in achieving high performance due to limitations in the design and manufacturing processes of their gate insulating layers and semiconductor layers.
Innovation Solution
The proposed solution involves a thin film transistor design where the gate insulating layer has recess portions at its surface, and the semiconductor layer includes holes that correspond to these recess portions, enhancing the overlap between the gate electrode and the semiconductor layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate insulating layer is made with a flat surface, then the manufacturing process is simple, but the carrier mobility is limited due to smaller grain size and more grain boundaries in the semiconductor layer
Solution Approach 1:
The gate insulating layer surface is segmented into multiple recess portions instead of being flat, creating a textured surface that influences the semiconductor layer formation. This segmentation allows the semiconductor grains to align better with the gate electrode, improving carrier mobility despite the increased structural complexity.
Solution Approach 2:
The gate insulating layer is designed with non-uniform local quality through the recess portions, where specific areas have different depths and positions. This local variation in the gate insulating layer structure creates favorable conditions for semiconductor grain growth and alignment, enhancing carrier mobility in critical regions.
2Reliability
If recess portions are added to the gate insulating layer, then carrier mobility improves due to larger grain size, but the manufacturing precision requirements increase
Solution Approach 1:
The recess portions are pre-formed in the gate insulating layer before the semiconductor layer is deposited. This preliminary action establishes the desired grain alignment pattern in advance, allowing the semiconductor material to naturally conform to the recess structure during deposition, thereby reducing the precision requirements for subsequent manufacturing steps.
3Reliability
If the recess portions are deeply formed, then the overlap area between gate electrode and semiconductor layer increases improving performance, but the gate insulating layer thickness is reduced limiting further depth
Solution Approach 1:
Instead of uniformly reducing the gate insulating layer thickness, the invention applies partial action by creating localized recess portions that extend into the gate insulating layer only where needed. This allows the overlap area to be increased in specific regions to improve performance, while the majority of the gate insulating layer maintains its full thickness to provide sufficient insulation.
Data Source
AI summary
A thin film transistor includes a gate electrode, a semiconductor layer overlapped with the gate electrode, a gate insulating layer between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode electrically connected to the semiconductor layer. The semiconductor layer includes a plurality of holes. The gate insulating layer may include a plurality of recess portions at a surface of the gate insulating layer facing the semiconductor layer. A method of manufacturing the thin film transistor is provided. A thin film transistor array panel and an electronic device may include the thin film transistor.