TFT Latch Circuit With Positive Feedback for Stable Pixel Voltage
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Solution Overview
Problem
Existing reflective liquid crystal display (LCD) panels in wearable devices face challenges with low refreshing frequency and low color gamut characteristics, leading to unstable pixel-driving voltage due to transistor leakage current, which is not compatible with amorphous silicon-based display panel production.
Innovation Solution
A thin-film transistor-based latch circuit is introduced, featuring a positive-feedback terminal and control sub-circuits to stabilize data voltage in pixel circuits, using N-type transistors to achieve latch function and maintain stable pixel-driving voltage, compatible with amorphous silicon-based panels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If PMOS or NMOS transistor is used in pixel circuit, then the pixel circuit can be manufactured with conventional processes, but the pixel-driving voltage cannot be maintained stable for long frame cycle time due to transistor leakage current
Solution Approach 1:
The patent implements a latch circuit with positive feedback mechanism using six thin-film transistors. The feedback path through transistors M3-M4 and M5-M6 maintains the voltage state at nodes P and Q, compensating for leakage effects and ensuring stable pixel-driving voltage throughout the long frame cycle period.
Solution Approach 2:
The pixel circuit is divided into functional sub-circuits: a latch circuit (M1-M6) for voltage storage and stabilization, and a display driver sub-circuit for signal processing. This segmentation allows the latch circuit to specifically address voltage stability while other components handle manufacturing compatibility.
2Reliability
If inverter with CMOS NOT gate devices is used to provide latch function, then the pixel-driving voltage can be maintained stable, but the structure is not compatible with amorphous silicon based display panel production
Solution Approach 1:
The patent changes the material parameter from crystalline silicon (required for CMOS) to thin-film silicon, enabling compatibility with amorphous silicon manufacturing processes. The six-transistor latch circuit is specifically designed to function with thin-film transistor characteristics, maintaining voltage stability while adapting to the constrained material system.
Solution Approach 2:
The patent replaces the CMOS NOT gate mechanism with an alternative latch mechanism using six thin-film transistors in a feedback configuration. This substitution eliminates the need for CMOS-specific device structures while achieving the same voltage latching and stabilization function through a different circuit topology.
3Use of energy by moving object
If low refreshing frequency is used in wearable devices, then power consumption is reduced, but the frame cycle time increases causing pixel-driving voltage instability
Solution Approach 1:
The latch circuit is activated before the frame cycle begins to pre-stabilize the pixel-driving voltage. By establishing the voltage state in advance through the latch mechanism, the circuit compensates for the extended duration of low-frequency operation, preventing voltage drift throughout the prolonged frame cycle.
Data Source
AI summary
The present application discloses a thin-film transistor-based latch circuit for latching a data voltage in a pixel circuit. The latch circuit includes an input terminal; a first node; an inverse node; a positive-feedback terminal coupled to the input terminal; a first control sub-circuit coupled respectively to the input terminal, the first node, a first power-supply port configured to be provided with a first voltage, and a second power-supply port configured to be provided with a second voltage; a second control sub-circuit coupled respectively to the input terminal, the first node, the inverse node, the first power-supply port, and the second power-supply port; and a third control sub-circuit coupled respectively to the inverse node, the positive-feedback terminal, the first power-supply port, and the second power-supply port.