TFT-LCD Array Substrate Dual-Line Bypass Repair
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Solution Overview
Problem
Conventional TFT-LCD array substrate manufacturing processes face inefficiencies due to complex and costly repair methods for broken gate or data lines, which increase power consumption and voltage drop, and reduce aperture ratio.
Innovation Solution
A TFT-LCD array substrate design featuring parallel and alternately arranged first and second gate lines and data lines, connected through conductive wires, forming parasitic capacitors and enabling dual conducting structures for signal transmission, and a manufacturing method that includes steps for forming these connections to facilitate auto-repair and reduce impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional laser repair method is used to repair broken gate lines or data lines, then the broken line can be repaired through bypass circuits, but the repairing process becomes complicated requiring 4 to 10 times of laser irradiation which causes low repairing efficiency
Solution Approach 1:
The gate line and data line are divided into multiple parallel segments (first gate line and second gate line, first data line and second data line) that can independently conduct signals. This segmentation allows the signal to bypass broken sections through parallel paths without requiring complex laser repair operations.
Solution Approach 2:
The patent introduces a parallel spatial dimension by arranging multiple gate lines and data lines side by side, connected through conductive wires at specific positions. When one line breaks, the signal can transition to the parallel line through these connection points, providing a dimensional alternative path for signal transmission.
2Reliability
If dual-line structure design is used for common electrode to enable bypass repair, then line repairability is improved, but aperture ratio is reduced more greatly which may increase power consumption
Solution Approach 1:
The dual-line structure is implemented locally only in the metal layer for gate and data lines, while the common electrode maintains its conventional single-structure design. This localized application of the parallel structure ensures repairability without unnecessarily increasing the area of the common electrode, thereby controlling power consumption.
Solution Approach 2:
The patent merges the repair function into the existing gate line and data line structure by adding parallel lines and conductive connections, rather than creating a separate repair system. This integration allows the same structural elements to serve both signal transmission and repair bypass functions.
3Reliability
If bypass circuit wire is used to accomplish the repairing object, then broken line repairability is achieved, but wire length will be increased inevitably which increases the voltage drop on the wire
Solution Approach 1:
The conductive wires connecting the parallel gate lines and data lines are pre-positioned at optimal locations during the manufacturing process. These connection points are strategically placed to minimize the length of bypass paths, thereby reducing voltage drop before any breakdown occurs.
Solution Approach 2:
By utilizing the parallel spatial arrangement of multiple lines, the bypass path is created through a lateral dimension rather than requiring a long detour along the original line direction. This dimensional approach significantly shortens the effective wire length needed for bypass connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for efficient signal transmission through bypasses when lines are broken, reduces electrical impedance, lowers the risk of electrostatic breakdown, and enhances the aperture ratio and yield rate of TFT-LCD products.
Implementation Method 1
overlapping areas between the first gate line and the second gate line of the gate-line metal layer and the first data line and the second data line forms a plurality of parasitic capacitors
Data Source
AI summary
The present invention provides a TFT-LCD array substrate having a gate-line metal layer, a data-line metal layer crossing the gate-line metal layer and a plurality of layers covering a periphery of the gate-line metal layer and the data-line metal layer; the gate-line metal layer has first gate lines and second gate lines parallel and alternately arranged, the date-line metal layer has first data lines and second data lines parallel and alternately arranged; the first gate line and the second gate line are electrically connected; the first data line and the second data line are electrically connected. The present invention further provides a manufacturing method of the TFT-LCD array substrate. Implementing the TFT-LCD array substrate and the manufacturing method can reduce the occurrence of line-broken in the active array of TFT-LCD, increase the aperture ratio of the product and enhance yield rate of the products.