TFT LCD Array Substrate Gray Tone Mask Process

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Solution Overview

Problem

The conventional 5Mask technology for manufacturing TFT LCD array substrates is complex and costly, with multiple process steps and low equipment utilization, limiting production capacity and yield.

Innovation Solution

A 4Mask or 3Mask process is introduced, using a gray tone mask to merge the source/drain electrode and transparent pixel electrode masks, allowing for sequential deposition of these layers in the same sputter equipment, reducing process steps and improving yield and equipment utilization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional 5Mask technology is used for manufacturing TFT LCD array substrate, then manufacturing precision and reliability are maintained, but device complexity and production cost increase, and productivity decreases

Engineering Contradiction:
Improveproduction capacityVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the Active Mask and S/D Mask into a single gray tone mask that performs both functions simultaneously. The gray tone mask contains both opaque regions (for S/D electrode formation) and partially transparent regions (for active layer formation), eliminating the need for separate masks and reducing the total mask count from 5 to 4.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gray tone mask serves multiple functions: it acts as both the active layer mask and the source/drain electrode mask in a single exposure step. This multi-functional mask reduces the number of photolithography cycles from 5 to 4 while maintaining the required patterning precision for both layers.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If conventional 5Mask technology is used, then manufacturing precision is maintained, but loss of time increases due to multiple process cycles

Engineering Contradiction:
Improvepatterning precisionVSAvoidprocess time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

By combining the active layer patterning and source/drain electrode patterning into a single gray tone mask exposure step, the patent reduces the number of sequential process cycles. This merging eliminates the time required for intermediate mask alignment and processing steps while maintaining patterning precision through the carefully designed gray tone regions.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If conventional 5Mask technology is used, then reliability is maintained, but equipment utilization ratio decreases

Engineering Contradiction:
ImproveyieldVSAvoidequipment utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent combines the deposition of transparent pixel electrode layer and source/drain electrode layer into a single sputtering process, followed by a single gray tone mask patterning step. This reduces the number of equipment cycles and increases sputter equipment utilization while maintaining product yield through the reliable gray tone mask technology.

Inventive Principle:
Principle #5Merging (Combining)

4Productivity

If gray tone mask technology is used to merge masks, then productivity and equipment utilization improve, but device complexity increases due to additional transparency control requirements

Engineering Contradiction:
Improveproduction capacityVSAvoidmask complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The gray tone mask employs local quality variation by creating regions with different light transmittance properties. The mask contains opaque regions (0% transmittance) for S/D electrode patterning, partially transparent gray tone regions (controlled transmittance) for active layer patterning, and transparent regions for opening formation, allowing precise local control of photoresist exposure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent utilizes parameter changes in light transmittance to achieve different patterning outcomes from a single mask. By controlling the transmittance ratio (duty ratio) of the slit regions versus empty regions in the gray tone areas, the mask creates the desired three-dimensional photoresist profile with varying thicknesses corresponding to different structural requirements.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The reduced number of masks and simplified process steps result in lower production costs, increased production capacity, and higher yield, while improving the utilization ratio of sputter equipment.

Implementation Method 1

sequential deposition of these layers in the same sputter equipment

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 2

Gray tone mask has a slit-shaped pattern thereon, and partially transparent patterned regions are formed on the mask due to the interference and diffraction of light passing the patterned regions of the mask

Methodology Applied
Scientific EffectLight absorption and transmission: Absorption (EM radiation)

Implementation Method 3

partially transparent patterned regions are formed on the mask due to the interference and diffraction of light passing the patterned regions of the mask

Methodology Applied
Scientific EffectDiffraction: Diffraction

Data Source

PatentUS7952099B2Thin film transistor liquid crystal display array substrate
Publication Date: 2011.05.31 BOE TECHNOLOGY GROUP CO LTD
  • US7952099B2 patent drawing
  • US7952099B2 patent drawing
  • US7952099B2 patent drawing

AI summary

A TFT LCD array substrate and a manufacturing method thereof. The manufacturing method includes the steps of: forming a thin film transistor on a substrate to form a gate line and a gate electrode connected with the gate line on the substrate; forming a gate insulating layer and a semiconductor layer on the gate electrode; forming an ohmic contact layer on the semiconductor layer; forming a transparent pixel electrode layer and a source/drain electrode metal layer in sequence on the resultant substrate, wherein the transparent pixel electrode layer is electrically insulated from the gate line and the gate electrode, and the transparent pixel electrode layer forms an ohmic contact with two sides of the semiconductor layer via the ohmic contact layer; and performing masking and etching with a gray tone mask with respect to the resultant substrate to form a transparent pixel electrode, a source/drain electrode and a data line simultaneously.