TFT-LCD Array Substrate Shared Common Electrode Line

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Solution Overview

Problem

The aspect ratio of thin film transistor liquid crystal displays (TFT-LCDs) is low due to non-transparent metal common electrode lines, resulting in low display brightness and high power consumption.

Innovation Solution

A TFT-LCD array substrate design where one common electrode line is shared between two vertically adjacent pixel regions, reducing the number of metal lines and increasing transparency, along with a manufacturing method involving multiple patterning steps to form gate lines, data lines, and pixel electrodes, including a passivation layer and transparent conductive film deposition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If metal common electrode lines are used in each pixel region, then electrical connectivity is ensured, but transparency is reduced and aspect ratio is low

Engineering Contradiction:
Improveelectrical connectivityVSAvoiddisplay brightness
Core Design Contradiction:
ReliabilityVSIllumination intensity

Solution Approach 1:

The patent merges the common electrode lines of two vertically adjacent pixel regions into a single shared line. Instead of having separate common electrode lines for each pixel region, the invention combines them so that one common electrode line serves both pixel regions, thereby reducing the total metal line area and improving transparency while maintaining electrical connectivity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The common electrode line is designed to serve multiple functions: it acts as the common electrode for both vertically adjacent pixel regions simultaneously. This multi-functional design allows a single metal line to provide electrical connectivity for multiple pixel regions, reducing the overall metal line density and improving display brightness.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If metal common electrode lines are used in each pixel region, then electrical connectivity is ensured, but power consumption increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidbacklight power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

By merging the common electrode lines of two vertically adjacent pixel regions into one shared line, the total length and area of metal lines are reduced. This reduction decreases the parasitic capacitance and resistance associated with the metal lines, thereby reducing the power consumption of the backlight while ensuring electrical connectivity is maintained.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If separate common electrode lines are provided for each pixel region, then electrical connectivity is optimized, but device complexity increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoidnumber of metal lines
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies the merging principle by combining the common electrode lines of two vertically adjacent pixel regions into a single shared line. This reduces the total number of metal lines from two separate lines to one shared line, thereby simplifying the device structure and reducing fabrication complexity while maintaining adequate electrical connectivity for both pixel regions.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the aspect ratio without affecting display brightness, reduces backlight power consumption, and decreases product costs while maintaining display quality.

Implementation Method 1

Step 1 of depositing a gate metal film on a substrate, forming a gate line, a gate electrode and a common electrode line for each pixel region by patterning the gate metal film

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 2

Step 4 of depositing a transparent conductive film on the substrate after Step 3, forming a pixel electrode of each pixel region, which is connected with the drain electrode through the passivation through hole, by patterning the transparent conductive film

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Data Source

PatentUS8405788B2TFT-LCD array substrate and manufacturing method thereof
Publication Date: 2013.03.26 BOE TECHNOLOGY GROUP CO LTD
  • US8405788B2 patent drawing
  • US8405788B2 patent drawing
  • US8405788B2 patent drawing

AI summary

A thin film transistor liquid crystal display (TFT-LCD) array substrate comprising a plurality of gate lines, a plurality of data lines and a plurality of common electrode lines. A plurality of pixel regions are formed by crossing of the plurality of gate lines and the plurality of data lines, a pixel electrode and a thin film transistor are provided for each pixel region, and one common electrode line is common to two vertically adjacent pixel regions.