TFT LCD Panel Single-Layer Gate and Data Line Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing poly silicon thin film transistor (TFT) liquid crystal display panel fabrication process is complex, requiring multiple mask processes, which increases costs and complicates the manufacturing process, especially when forming a CMOS TFT with a storage capacitor.
Innovation Solution
The proposed solution involves forming gate, data, and storage lines on the same layer in the display area, with at least one of these lines being discontinuous in the pixel region and continuous in other areas, using a reduced number of mask processes to simplify the fabrication of a poly silicon TFT substrate, including the formation of a storage capacitor by overlapping the pixel electrode with the storage line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple mask processes are used to form gate line, data line, and storage line separately, then the liquid crystal display panel can be fabricated with proper line formation, but the manufacturing process becomes complex and costly
Solution Approach 1:
The patent merges the formation of gate line, data line, and storage line into a single mask process by forming them as a integrated conductive layer pattern. This consolidation reduces the number of separate mask processes from nine to six, simplifying the fabrication process while maintaining the precision of line formation through unified patterning.
Solution Approach 2:
The conductive layer is designed to serve multiple functions simultaneously - forming gate lines, data lines, and storage lines all in one layer. This multi-functional approach allows a single mask process to accomplish what previously required multiple separate processes, reducing complexity while maintaining manufacturing precision.
2Reliability
If nine mask processes are used for CMOS TFT with storage capacitor, then complete device formation is achieved, but material and equipment costs increase
Solution Approach 1:
The patent combines the formation of gate line, data line, and storage line into one mask process step. This merging reduces the total number of mask processes from nine to six, directly lowering material consumption (photoresist, etchants) and equipment usage costs while ensuring complete device formation through the integrated patterning approach.
Solution Approach 2:
The conductive layer pattern is designed to universally form multiple line types (gate, data, storage) simultaneously. This multi-functionality allows a single mask process to replace multiple specialized processes, reducing manufacturing costs while maintaining complete device formation through unified patterning.
3Reliability
If gate line and data line are formed on different layers, then proper electrical separation is achieved, but the fabrication process requires more steps
Solution Approach 1:
The patent merges gate line and data line formation into the same conductive layer, achieving electrical separation not through layer separation but through spatial routing and contact hole isolation. This approach maintains proper electrical separation while significantly improving fabrication efficiency by reducing the number of deposition and patterning steps.
Solution Approach 2:
Instead of separating gate and data lines vertically through different layers, the patent resolves electrical separation in the planar dimension through strategic routing and contact hole placement. This dimensional shift allows single-layer formation with improved productivity while maintaining electrical isolation through spatial design rather than layer stacking.
Data Source
AI summary
A thin film transistor (TFT) liquid crystal display panel and fabrication method are described. The panel has a data line and a gate line connected with a TFT and formed on the same layer. One of data or gate lines is discontinuous and the other is continuous in a pixel region such that the continuous line bisects the discontinuous line. A passivation film protects the TFT. Contact holes penetrate the passivation film and expose segments of the discontinuous line. A contact electrode connects the segments through the contact holes.