Thin Film Transistor Light Leakage Current Reduction
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Solution Overview
Problem
Thin film transistors with amorphous semiconductor layers stacked over microcrystalline semiconductor layers experience significant increases in off current when the gate electrode overlaps with both layers, particularly at low gate voltages, leading to reduced display quality due to increased light leakage current.
Innovation Solution
A bottom-gate thin film transistor structure is implemented, where a semiconductor layer with high carrier mobility is stacked over a layer with low carrier mobility, and an impurity semiconductor layer is provided between the high mobility layer and the drain electrode, with the entire surface of the high mobility layer shielded from light by a gate electrode made of a light-blocking material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If a gate electrode is provided to overlap with the semiconductor layer to shield it from light, then light leakage current is reduced, but off current increases significantly
Solution Approach 1:
The semiconductor layer is divided into two distinct layers: a first semiconductor layer with high carrier mobility and a second semiconductor layer with low carrier mobility. This segmentation allows each layer to perform its specialized function - the first layer provides high on-current while the second layer suppresses off-current even when shielded by the gate electrode
Solution Approach 2:
Different regions of the semiconductor structure are assigned different carrier mobility characteristics. The first semiconductor layer has high carrier mobility for efficient current conduction when on, while the second semiconductor layer has low carrier mobility to minimize leakage current when off, creating local quality variations that resolve the contradiction
2Object-affected harmful factors
If an amorphous semiconductor layer is stacked over a microcrystalline semiconductor layer with gate electrode overlap, then light shielding is achieved, but off current jumps significantly at low gate voltages
Solution Approach 1:
The invention changes the carrier mobility parameter by stacking layers with different mobility values. The second semiconductor layer's low carrier mobility parameter is specifically chosen to suppress off-current, while the first layer's high carrier mobility parameter maintains good on-current characteristics, resolving the instability issue
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces light leakage current and increases the on/off ratio, resulting in improved display contrast and reduced power consumption by ensuring minimal off current even when the semiconductor layer is shielded from light.
Implementation Method 1
an entire surface of the semiconductor layer is shielded from light by a gate electrode
Implementation Method 2
The light leakage current is a current which is generated when the photovoltaic effect is caused in a semiconductor layer of the thin film transistor by irradiation of the semiconductor layer with light
Data Source
AI summary
A thin film transistor includes: a gate electrode layer; a first semiconductor layer; a second semiconductor layer having lower carrier mobility than the first semiconductor layer, which is provided over and in contact with the first semiconductor layer; a gate insulating layer which is provided between and in contact with the gate electrode layer and the first semiconductor layer; first impurity semiconductor layers which are provided so as to be in contact with the second semiconductor layer; second impurity semiconductor layers which are provided so as to be partially in contact with the first impurity semiconductor layers and the first and second semiconductor layers; and source and drain electrode layers which are provided so as to be in contact with entire surfaces of the second impurity semiconductor layers, in which an entire surface of the first semiconductor layer on the gate electrode layer side overlaps with the gate electrode layer.