CMOS-Like TFT Logic Gates With Bootstrapped Full-Swing Output

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Solution Overview

Problem

Conventional unipolar n-type Thin Film Transistors (TFTs) struggle with low stage-to-stage gain and high static leakage-current, limiting the integration of complex logic circuits and failing to provide full-swing output signals, which is exacerbated in flexible displays and IoT devices.

Innovation Solution

A CMOS-like logic gate design incorporating a set of TFTs with a bootstrapped feedback network, including pull-down, diode-connected TFTs, and an output pull-up transistor, along with a capacitor, to achieve full-output swing, and a leakage current path, with specific TFT widths and connections to reduce static leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional unipolar n-type TFTs are used to construct logic gates, then the device complexity is reduced and fabrication is simplified, but the static leakage current increases and full-swing output signals cannot be achieved

Engineering Contradiction:

Improvelogic gate structureVSAvoidstatic leakage current

Core Design Contradiction:

Device complexityVSObject-generated harmful factors

Solution Approach 1:

The logic gate is segmented into distinct functional blocks: bootstrapped feedback network (comprising diode-connected TFTs and capacitor), pull-down network, and pull-up network. This segmentation allows each block to be optimized independently - the feedback network manages voltage swing while the pull-down/pull-up networks control current flow, thereby reducing static leakage without increasing overall device complexity

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A bootstrapped feedback network acts as an intermediary mechanism between the input and output nodes. The network uses diode-connected TFTs and a capacitor to generate a boosted feedback voltage that dynamically controls the pull-up and pull-down TFTs, enabling full-swing output while maintaining low static leakage current through precise timing control

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If conventional unipolar n-type TFTs are used in multi-stage circuits, then the manufacturing process is simplified, but the logic swing is successively reduced and logic functionality is lost after a few stages

Engineering Contradiction:

Improvefabrication processVSAvoidlogic swing

Core Design Contradiction:

Ease of manufactureVSStability of the object's composition

Solution Approach 1:

A bootstrapped feedback network is implemented using diode-connected TFTs and a capacitor to sense the output voltage and generate a boosted feedback signal. This feedback mechanism compensates for voltage drops in each stage, maintaining full logic swing (0 to VDD) across multiple cascaded stages while using standard unipolar n-type TFT fabrication processes

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The bootstrapped feedback network performs preliminary action by pre-charging the capacitor during the input low period and subsequently using this stored charge to boost the feedback voltage during the input high period. This preliminary charging action ensures that the pull-up TFT can drive the output to full VDD level, maintaining logic swing integrity through multiple stages

Inventive Principle:

Principle #10Preliminary action

3Device complexity

If both transistors are ON when input signal is high in conventional unipolar n-type TFT inverter, then the circuit is simple, but excessive direct path current flows and output voltage does not reach ground level

Engineering Contradiction:

Improveinverter configurationVSAvoiddirect path current

Core Design Contradiction:

Device complexityVSLoss of energy

Solution Approach 1:

The inverter employs dynamic control of transistor switching through the bootstrapped feedback network. The feedback voltage dynamically adjusts the gate voltages of pull-up and pull-down TFTs based on the input signal timing, ensuring that transistors are not simultaneously ON during steady state, thereby eliminating the direct path current while maintaining simple n-type TFT configuration

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS20250265998A1Method and system for CMOS-like logic gates using tfts and applications therefor

Publication Date: 2025.08.21 GOHARDEHI SHEIDA

AI summary

The disclosure is directed at a CMOS-like logic gate including a set of thin-film transistors (TFTs), the set of TFTs including a subset of pull down TFTs, a subset of diode-connected TFTs and an output pull-up transistor; and a capacitor; wherein the subset of diode-connected TFTs, the output pull-up transistor and the capacitor are positioned to provide a bootstrapped feedback network to provide full-output swing; and wherein the subset of diode-connected TFTs and one of the subset of pull-down TFTs form a leakage current path; and wherein at least one of the subset of pull-down TFTs is connected to a first input.