Thin-Film Transistor Multi-Channel Stacked Structure
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Solution Overview
Problem
Conventional dual-gate thin-film transistors have a small ON-state current, leading to slow switching speed due to limitations in increasing channel width or reducing channel length, which affects the aperture ratio and causes short channel effects.
Innovation Solution
The thin-film transistor design includes a semiconductor layer with a thickness of 200 nm-2000 nm and multiple semiconductor layers, along with via structures and ohmic contact layers, to form multiple current channels, increasing the ON-state current and switching speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the channel width of the dual-gate TFT is increased to increase the ON-state current, then the ON-state current is improved, but the aperture ratio of the liquid crystal display device is reduced
Solution Approach 1:
The patent transitions from a conventional single-channel planar structure to a multi-layer stacked structure with multiple current channels. By adding vertical dimension (stacking multiple semiconductor layers with corresponding gates), the current conduction path is extended in the vertical direction, enabling multiple parallel current channels without increasing the horizontal channel width, thus maintaining aperture ratio while increasing ON-state current.
Solution Approach 2:
The semiconductor layer is divided into multiple stacked layers (first semiconductor layer, second semiconductor layer, etc.), each forming an independent current channel. This segmentation allows the total ON-state current to be the sum of currents from multiple channels, achieving higher overall current without requiring a single wide channel that would reduce aperture ratio.
2Power
If the channel length of the dual-gate TFT is reduced to increase the ON-state current, then the ON-state current is improved, but short channel effects occur
Solution Approach 1:
Instead of reducing channel length in the horizontal direction (which causes short channel effects), the patent extends the effective channel length by stacking multiple semiconductor layers vertically. This creates multiple current channels in parallel, increasing total current while maintaining adequate channel length in each individual layer, thereby avoiding short channel effects.
Solution Approach 2:
The current conduction path is segmented into multiple independent channels through layering. Each layer maintains its own channel length, allowing optimization of channel length for reliability while the parallel structure provides increased total current capacity.
3Power
If the channel width is increased to form more current channels, then the ON-state current is improved, but the device area increases
Solution Approach 1:
The patent uses the vertical dimension (stacking layers) to create multiple current channels instead of expanding in the horizontal plane. This allows N current channels to be formed within the same footprint area by stacking N semiconductor layers, each with its own gate, thereby increasing ON-state current without increasing device area.
Data Source
AI summary
Disclosed is a thin-film transistor. The thin-film transistor includes: a substrate; a first gate, a first gate insulation layer, a semiconductor layer, an etching stop layer, and the second gate stacked on a surface of the substrate, in which the semiconductor layer has a thickness of 200 nm-2000 nm; the etching stop layer includes a first via and a second via formed therein; and the first via and the second via are arranged to each correspond to the semiconductor layer; and a source and a drain respectively extending through the first via and the second via to connect to the semiconductor layer. The thin-film transistor has an increased ON-state current and switching speed.