Thin-Film Transistor Overlap Layout to Suppress Kink Effect
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Solution Overview
Problem
High drain voltage in thin-film transistor structures can cause avalanche multiplication of carriers, leading to a kink effect that affects normal operation by increasing drain current and causing abnormal performance in display devices.
Innovation Solution
A thin-film transistor structure comprising a first and second transistor, each with a gate electrode, gate insulation layer, active layer, etching barrier layer, and drain metal layer, where the overlapping area of the signal output electrode and etching barrier layer is greater than the signal input electrode for the first transistor, and vice versa for the second transistor, forming capacitive effects to control carrier accumulation and suppress the kink effect during charging and discharging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high drain voltage is applied to increase carrier concentration for achieving conduction, then the transistor can be turned on and conduct current, but avalanche multiplication of carriers occurs causing kink effect and abnormal current increase
Solution Approach 1:
An etching barrier layer is introduced as an intermediary structure between the active layer and drain electrode. This layer forms a capacitive structure that mediates the electric field distribution, preventing direct high-field stress on the active layer and suppressing avalanche multiplication of carriers that causes the kink effect
Solution Approach 2:
The patent modifies the physical and electrical parameters of the transistor structure by adding the etching barrier layer with specific dielectric properties. This changes the electric field distribution and carrier transport characteristics, enabling the transistor to operate at high drain voltages without experiencing the kink effect while maintaining reliable conduction control
2Reliability
If the overlapping area of signal output electrode and etching barrier layer is increased to suppress kink effect during charging, then carrier accumulation is controlled, but device structure complexity increases
Solution Approach 1:
The etching barrier layer is selectively positioned with different overlapping areas at the input and output electrodes. The local quality of the capacitive effect is optimized at each electrode location - larger overlap at the output electrode for charging suppression, and appropriate overlap at the input electrode for maintaining normal operation, thereby suppressing kink effect locally without requiring global structural changes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure effectively suppresses the kink effect by controlling carrier concentration, ensuring smoother charging and discharging processes and improving high-voltage resistance characteristics, thereby enhancing the performance and reliability of thin-film transistor devices.
Implementation Method 1
an overlapping area of the signal output electrode of the first transistor and the etching barrier layer is greater than an overlapping area of the signal input electrode of the first transistor and the etching barrier layer
Implementation Method 2
an overlapping area of the signal input electrode of the second transistor and the etching barrier layer is larger than an overlapping area of the signal output electrode of the second transistor and the etching barrier layer
Data Source
AI summary
A thin-film transistor structure and an electronic device are provided. The thin-film transistor structure includes a first transistor and a second transistor. A potential of the signal input electrode of the first transistor is greater than that of the signal receiving component, and the first transistor is turned on; and a potential of the signal input electrode of the second transistor is less than that of the signal receiving component, and the second transistor is turned on; and an overlapping area of the signal output electrode of the first transistor and the etching barrier layer is greater than that of the signal input electrode of the first transistor and the etching barrier layer; and an overlapping area of the signal input electrode of the second transistor and the etching barrier layer is larger than that of the signal output electrode of the second transistor and the etching barrier layer.