Thin Film Transistor Fabrication Using Patterned Photoresist Mask

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Solution Overview

Problem

The existing method for fabricating low temperature poly-silicon (LTPS) thin film transistors requires numerous masks, leading to high costs and alignment shifts between mask steps, which complicates the process and increases the likelihood of defects.

Innovation Solution

A method involving a patterned photoresist layer with different thicknesses is used, allowing for the patterning of semi-conductive layers and ion doping processes to be performed using a single mask, thereby reducing the number of masks needed and minimizing alignment shifts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple masks are used for patterning and ion doping steps, then the fabrication precision can be maintained, but the device complexity and manufacturing cost increase significantly

Engineering Contradiction:

Improvealignment precisionVSAvoidnumber of masks

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple patterning and ion doping steps into a single mask process. The photoresist layer is patterned to define both the semiconductor active area and the ion doping regions simultaneously, eliminating the need for separate masks for each step and reducing overall process complexity

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The single photoresist mask serves multiple functions: it defines the semiconductor active area boundaries, determines the ion doping regions, and guides subsequent processing steps. This multi-functional mask design replaces what would traditionally require multiple specialized masks

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Manufacturing precision

If multiple masks are used for different process steps, then the patterning accuracy can be maintained, but the productivity decreases due to increased process time

Engineering Contradiction:

Improvepatterning accuracyVSAvoidfabrication efficiency

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

Multiple process steps (semiconductor patterning and ion doping) are merged into a single mask application and exposure cycle, reducing the number of sequential operations required while maintaining the precision needed for each individual step

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The photoresist layer is prepared in advance with specific thickness variations that pre-determine the outcomes of subsequent etching and ion doping steps, allowing multiple features to be defined in a single patterning operation rather than requiring multiple sequential patterning steps

Inventive Principle:

Principle #10Preliminary action

3Manufacturing precision

If additional masks are introduced for complex patterning, then the manufacturing precision can be improved, but the harmful factors increase due to alignment shifts between masks

Engineering Contradiction:

Improvepattern definition accuracyVSAvoidalignment shift defects

Core Design Contradiction:

Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

By combining multiple patterning and doping functions into a single mask, the patent eliminates the alignment shifts that occur between sequential mask applications, as there is only one mask to align

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent converts the potential harm of complex multi-mask alignment into a benefit by using a single mask design that inherently avoids alignment issues while still achieving the required pattern complexity through clever photoresist thickness modulation

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the lithography and etching steps, reduces manufacturing costs, and decreases defect formation by eliminating the need for additional masks, thereby enhancing the efficiency and yield of the thin film transistor fabrication process.

Implementation Method 1

forming a patterned photoresist layer with a first thickness and a second thickness on the semi-conductive layer... patterning the semi-conductive layer by using the patterned photoresist layer as a mask

Methodology Applied

Scientific EffectPhotomasking: Absorption (EM radiation)

Implementation Method 2

performing a first ion doping process on the patterned semi-conductive layer by using the first thickness of the patterned photoresist layer as a mask

Methodology Applied

Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS8273609B2Method for fabricating thin film transistors and array substrate including the same

Publication Date: 2012.09.25 INNOLUX CORP

AI summary

The present invention relates to a method for fabricating thin film transistors (TFTs), which includes the following steps: forming a semi-conductive layer on a substrate; forming a patterned photoresist layer with a first thickness and a second thickness on the semi-conductive layer; pattering the semi-conductive layer by using the patterned photoresist layer as a mask to form a patterned semi-conductive layer; removing the second thickness of the patterned photoresist layer; performing a first ion doping process on the patterned semi-conductive layer by using the first thickness of the patterned photoresist layer as a mask; removing the first thickness of the patterned photoresist layer; and forming a dielectric layer and a gate on the patterned semi-conductive layer. The present invention also discloses a method for fabricating an array substrate including aforementioned TFTs.