TFT Pixel Threshold Voltage Compensation Circuit With Triple Gate Isolation
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Solution Overview
Problem
Existing OLED pixel circuits face challenges in achieving uniform brightness due to variations in threshold voltage and carrier mobility of drive transistors, leading to longer one horizontal time (1H) and potential noise interference during emission phases, which affects display responsiveness and true black performance.
Innovation Solution
The implementation of a pixel circuit with a triple gate isolation structure and a two-capacitor configuration, where threshold compensation and data programming phases are separated, allowing for ultra-short 1H times (<2 μs) and minimizing noise interference by using a triple gate connection between the data voltage line and the gate of the drive transistor, and independent threshold compensation and data programming operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If threshold compensation and data programming are performed simultaneously, then circuit complexity is reduced, but one horizontal time increases due to compensation accuracy requirements
Solution Approach 1:
The patent segments the pixel circuit into two independent capacitor structures: one dedicated to threshold voltage compensation and another to data programming. This segmentation allows both operations to proceed independently without interfering with each other, enabling simultaneous execution while maintaining compensation accuracy and reducing one horizontal time.
Solution Approach 2:
The patent creates a multi-functional pixel circuit where two capacitors serve dual purposes: one capacitor handles threshold compensation while the other handles data programming, yet both can operate simultaneously within the same pixel circuit framework, maximizing resource utilization and reducing overall operation time.
2Loss of time
If data programming is performed during threshold compensation phase, then one horizontal time is reduced, but noise from data line interferes with threshold voltage accuracy
Solution Approach 1:
The patent physically segments the threshold compensation circuit and data programming circuit into separate capacitor structures with isolated connection paths. The triple gate transistor structure further segments the control signals, ensuring that data line noise cannot couple into the threshold voltage measurement path, thus maintaining accuracy while enabling time-efficient operation.
Solution Approach 2:
The patent introduces triple gate transistors as intermediary control elements between the data line and the threshold compensation capacitor. These intermediary transistors act as noise filters and isolation barriers, allowing data programming to proceed simultaneously without allowing noise to corrupt the threshold voltage measurement accuracy.
3Measurement precision
If compensation time is extended for high accuracy, then threshold voltage compensation precision improves, but display responsiveness decreases
Solution Approach 1:
By segmenting the compensation and programming functions into separate capacitor structures, the patent enables parallel execution of both operations. This eliminates the sequential dependency where programming must wait for compensation to complete, thus maintaining high compensation accuracy while significantly improving display responsiveness.
Solution Approach 2:
The patent performs threshold voltage compensation in advance during a dedicated compensation phase, storing the compensated threshold in a separate capacitor. This preliminary action allows the data programming phase to proceed independently and simultaneously in subsequent operations, improving overall responsiveness without sacrificing compensation accuracy.
Data Source
AI summary
A pixel circuit has enhanced performance by minimizing noise effects from the data and reference voltage lines. To prevent data line noise from interfering with the drive transistor gate voltage during emission, a triple gate isolation is used between the data voltage line and the gate of the drive transistor by which three transistors are connected between the data voltage line and the gate of the drive transistor. To further improve the isolation, one of the middle nodes of the triple gate farthest from the data voltage line is connected to one floating node that is connectable to a reference voltage during the threshold compensation phase. A first capacitor is used for the threshold compensation, and a second capacitor is used to scale the data voltage during programming. The threshold compensation and data programming operations are thereby independent of each other to minimize programming time.


