TFT Protective Films for Carrier Mobility and Dangling Bond Control

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Solution Overview

Problem

The inverted staggered channel etch (CE) structure of amorphous silicon (a-Si) thin film transistors (TFTs) has low driving performance due to low carrier mobility, which is exacerbated by the increase in dangling bonds during manufacturing processes like plasma etching and heat treatment, limiting their use in peripheral circuits for AMLCD and AMOLED devices.

Innovation Solution

A thin film transistor design that includes a gate electrode, a gate insulating film, a semiconductor layer with a channel region, source, and drain electrodes, covered by a first protective film that discharges moisture through heat treatment and a second protective film that suppresses moisture out-diffusion, enhancing carrier mobility and reducing dangling bonds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the inverted staggered CE structure is used to simplify manufacturing and increase productivity, then productivity is improved, but carrier mobility deteriorates due to increased dangling bonds from plasma etching and heat treatment

Engineering Contradiction:
Improvemanufacturing productivityVSAvoidcarrier mobility
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A protective film is formed on the semiconductor layer before plasma etching and heat treatment processes. This protective film prevents the generation of dangling bonds during these manufacturing steps, preserving carrier mobility while allowing the use of the simplified inverted staggered CE structure for high productivity manufacturing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective film acts as an intermediary layer between the semiconductor layer and the harsh plasma etching environment. It mediates the interaction by providing a barrier that prevents direct damage to the semiconductor, thereby maintaining electrical properties while enabling the manufacturing process to proceed

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the channel width is increased to compensate for low on-current, then on-current is improved, but the occupation area increases which interferes with higher resolution

Engineering Contradiction:
Improveon-currentVSAvoidTFT occupation area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

By forming a protective film that prevents dangling bond generation, the carrier mobility parameter is improved. This allows the TFT to achieve higher on-current with a smaller channel width, thereby reducing the occupation area and enabling higher display resolution

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves TFT characteristics by increasing carrier mobility and on-current, achieving high drive reliability and better display properties for liquid crystal and organic EL display devices.

Implementation Method 1

a first protective film which is directly in contact with the channel region of the semiconductor layer and discharges moisture by a heat treatment

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Implementation Method 2

a second protective film formed to cover the first protective film and suppress moisture out-diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS7847295B2Thin film transistor, display device using thereof and method of manufacturing the thin film transistor and the display device
Publication Date: 2010.12.07 TRIVALE TECHNOLOGIES LLC
  • US7847295B2 patent drawing
  • US7847295B2 patent drawing
  • US7847295B2 patent drawing

AI summary

A thin film transistor includes a gate electrode, a gate insulating film formed to cover the gate electrode, a semiconductor layer including a channel region formed over the gate electrode, a source electrode and a drain electrode including a region connected to the semiconductor layer, where at least a part of the region is overlapped with the gate electrode, an upper insulating film formed to cover the semiconductor layer, the source electrode and the drain electrode, where the upper insulating film is directly in contact with the channel region of the semiconductor layer and discharges moisture by a heat treatment and a second upper insulating film formed to cover the first protective film and suppress moisture out-diffusion.