Thin Film Transistor Substrate With Recessed Gate Electrode

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Solution Overview

Problem

Thin film transistor substrates face issues with leakage current due to insufficient channel formation and high power consumption, particularly when high ON and OFF voltages are required, which affects the performance and efficiency of active liquid crystal and organic electroluminescence displays.

Innovation Solution

The substrate design includes a recessed active layer with through holes and grooves, allowing the gate electrode to extend between the source and drain electrodes, creating a three-dimensional channel and reducing leakage current, and a gate insulating film for insulation, which helps in managing voltage and current flow effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a high ON voltage is applied to the gate electrode to sufficiently form a channel, then current flows smoothly, but power consumption increases

Engineering Contradiction:
Improvechannel formation qualityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent introduces a three-dimensional channel structure by forming the gate electrode to extend in the vertical direction (z-axis) in addition to the horizontal direction, creating a volumetric channel region. This dimensional transformation allows the channel to be formed more efficiently with lower gate voltages, reducing power consumption while maintaining reliable current flow.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The gate electrode is positioned within a recess formed in the semiconductor layer, creating a nested structure where the gate is embedded in the semiconductor material. This nesting configuration enhances the electric field coupling between the gate and channel, improving channel formation efficiency and reducing the voltage required for operation.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If a high OFF voltage is applied to the gate electrode to completely extinguish the channel, then leakage current is reduced, but power consumption increases

Engineering Contradiction:
Improvechannel extinction completenessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The gate electrode embedded within the recessed semiconductor layer creates a nested configuration that provides superior electric field control. This structure enables complete channel extinction at lower OFF voltages compared to planar configurations, reducing leakage current and power consumption while maintaining reliable switching performance.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Reliability

If the gate electrode is positioned above the active layer, then channel formation is effective, but the opening ratio is reduced

Engineering Contradiction:
Improvechannel formation efficiencyVSAvoidopening ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The gate electrode extends in the vertical dimension by penetrating into the semiconductor layer, allowing the channel to be formed in the volumetric region occupied by the gate. This three-dimensional channel formation maintains effective channel control while enabling the surface above the gate to be used for other purposes, thereby increasing the opening ratio.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

By nesting the gate electrode within a recess in the semiconductor layer, the gate occupies vertical space rather than horizontal space. This allows the channel to be formed in the gate's volumetric region without reducing the horizontal opening area, thus maintaining channel formation efficiency while increasing the opening ratio.

Inventive Principle:
Principle #7Nested doll (Nesting)

4Reliability

If the active layer is made thicker to improve channel capacity, then current flow improves, but leakage current increases

Engineering Contradiction:
Improvechannel capacityVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The gate electrode is nested within a recess in the semiconductor layer, creating a confined volumetric channel region. This nested structure provides better electric field confinement and control throughout the channel volume, enabling thicker active layers that maintain high channel capacity while suppressing leakage current through improved field management.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces leakage current and power consumption, improves the opening ratio, and enhances the performance of thin film transistors by allowing for efficient channel formation and voltage management.

Implementation Method 1

If an ON voltage equal to or greater than a threshold voltage is applied to a gate electrode, a channel is formed

Methodology Applied
Scientific EffectElectric Field: Electric Field

Implementation Method 2

the gate insulating film is interposed between the gate electrode and the active layer

Methodology Applied
Scientific EffectElectrical Insulation: Electrical Resistance

Data Source

PatentUS8697535B2Thin film transistor substrate and method for fabricating the same
Publication Date: 2014.04.15 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US8697535B2 patent drawing
  • US8697535B2 patent drawing
  • US8697535B2 patent drawing

AI summary

A thin film transistor substrate includes a substrate, a gate electrode on the substrate, an active layer on or below the gate electrode (the active layer at least partially overlapping the gate electrode) including a first active region and a second active region, the first active region and the second active region facing each other and extending beyond the gate electrode, a source electrode electrically connected to the first active region and a drain electrode electrically connected to the second active region, wherein the active layer includes a recess region which is at least partially recessed from a surface of the active layer facing the gate electrode, and the recess region includes a portion extending between the first active region and the second active region.