Testing Thin Film Transistor Relocation for Display Device Integration
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Solution Overview
Problem
The reduction in size of driver IC chips in display devices limits the size of the testing thin film transistor, leading to signal delay and decreased productivity due to the detection of ignorable defects and visible spots from stress in switching elements within the display area.
Innovation Solution
A display device design that includes a substrate with a display signal line, a contact assistant on a pad region as a draw-out terminal, and a testing thin film transistor connected between the substrate and the driver IC chip, ensuring the size of the testing thin film transistor is maintained, with a gate insulating layer and passivation layer facilitating connections for test signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the size of driver IC chips is reduced, then the integration density is improved, but the size of the testing thin film transistor is limited
Solution Approach 1:
The testing thin film transistor is relocated from the limited area under the driver IC chip to the pad region, utilizing a different spatial dimension. The pad region provides sufficient area for the testing transistor while maintaining the reduced IC chip size, thus resolving the contradiction between integration density and testing transistor size.
2Length of moving object
If the size of the testing thin film transistor is reduced, then the IC chip size can be smaller, but signal delay increases
Solution Approach 1:
By moving the testing thin film transistor to the pad region (spatial repositioning), the signal path length is extended sufficiently to accommodate an adequately sized transistor without increasing IC chip dimensions. This allows the transistor to maintain appropriate size for fast switching while the IC chip remains compact.
3Length of moving object
If the size of the testing thin film transistor is reduced, then the IC chip can be smaller, but productivity decreases due to detection of ignorable defects
Solution Approach 1:
Relocating the testing thin film transistor to the pad region provides adequate space for proper transistor sizing, ensuring reliable defect detection without false positives from ignorable defects. The larger testing transistor in the pad region maintains testing accuracy while the IC chip itself remains small, thus improving productivity by reducing retesting and false defect identification.
4Length of moving object
If the size of the testing thin film transistor is reduced, then the IC chip can be smaller, but visible spots appear due to stress of switching elements
Solution Approach 1:
By positioning the testing thin film transistor in the pad region rather than under the IC chip, the transistor can maintain adequate size without increasing IC chip dimensions. This proper sizing reduces stress concentration in the switching elements, preventing visible spots and other defects that would compromise display quality.
Data Source
AI summary
The present invention relates to a display device including a substrate, a display signal line disposed on the substrate, a contact assistant disposed on the pad region of the substrate as a draw-out terminal of the display signal line, a driver IC chip disposed on the substrate and connected to the display signal line through the contact assistant, and a testing thin film transistor disposed between the substrate and the driver IC chip. The testing thin film transistor and the display signal line are connected to each other.