Bottom Gate TFT Removal Regions for Photoleakage Current Reduction
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Solution Overview
Problem
Conventional liquid crystal display devices face challenges in reducing photoleakage current while maintaining a high aperture ratio, particularly in mobile terminals where pixel size is minimized, due to limitations in processing accuracy and drive ability.
Innovation Solution
The implementation of a bottom gate type thin film transistor with a laminate structure featuring a gate electrode, gate insulating film, and semiconductor layer, where removal regions in the gate insulating film are formed on both sides of the gate electrode to reduce the size of the gate electrode and prevent semiconductor layer extension, thereby reducing photoleakage current and improving aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate electrode is formed larger in width than the semiconductor layer to account for processing dimension fluctuations, then the photoleakage current is reduced, but the aperture ratio of the pixel is reduced
Solution Approach 1:
The invention introduces a vertical dimension solution by forming the semiconductor layer to protrude from the gate electrode surface, rather than expanding the gate electrode horizontally. This dimensional shift allows the gate electrode width to match the semiconductor layer width precisely, eliminating the need for oversized gate electrodes while maintaining photoleakage current reduction effectiveness.
Solution Approach 2:
Instead of making the gate electrode larger than the semiconductor layer (conventional approach), the invention inverts the relationship by making the semiconductor layer protrude beyond the gate electrode. This inversion resolves the contradiction by achieving photoleakage reduction without requiring a larger gate electrode, thus preserving the aperture ratio.
2Measurement precision
If the pixel area is reduced to achieve high definition, then the storage capacitance is reduced, but the leakage current increases
Solution Approach 1:
The invention changes the geometric parameters of the thin film transistor structure, specifically making the semiconductor layer width extend beyond the gate electrode width. This parameter change enables effective photoleakage current reduction even in miniaturized pixels, allowing high definition displays to maintain low leakage currents despite reduced pixel and capacitance sizes.
3Area of stationary object
If the size of the thin film transistor is reduced to improve aperture ratio, then the processing accuracy and drive ability are limited, but the photoleakage current reduction becomes difficult
Solution Approach 1:
The invention shifts from horizontal dimension optimization (gate electrode width) to vertical dimension optimization (semiconductor layer protrusion). This allows precise control of the semiconductor layer relative to the gate electrode without requiring excessive gate electrode width, enabling miniaturized transistors to achieve both low photoleakage current and high aperture ratio.
Data Source
AI summary
Provided is an image display device including thin film transistors on a substrate, including: gate lines and drain lines intersecting the gate lines, each thin film transistor having, in a channel region, a laminate structure in which a gate electrode, a gate insulating film, and a semiconductor layer are laminated in the stated order from the substrate side; and a pair of removal regions in which parts of the gate insulating film are removed, which are formed on both sides of the gate electrode and formed in a channel width direction of the channel region, in which when W represents a width of the gate electrode in the channel width direction of the channel region, and R represents a width of the gate insulating film in the channel width direction, which is sandwiched between the pair of removal regions, R≧W is satisfied.