TFT Second Region Length for Leak Current Suppression
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Solution Overview
Problem
The reduction in size of thin-film transistors in display devices leads to increased leak current, potentially causing display defects like bright pixels, and existing structures to suppress leak current are affected by manufacturing variances and ON resistance.
Innovation Solution
A display device structure with a semiconductor layer having specific impurity regions, including a second region with a length of 5 μm or more between the first and second channel regions, which increases resistance and reduces leak current without significant variance in manufacturing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the thin-film transistor size is reduced to maintain pixel aperture area, then the pixel aperture area is preserved, but the leak current increases
Solution Approach 1:
The patent applies local quality by creating a Low Concentration Impurity Region (LCIR) with specific impurity concentration (1×10^19 to 1×10^21 atoms/cm³) between the channel region and high-concentration impurity region. This localized modification of impurity concentration in a specific region suppresses leak current without affecting the overall transistor size or pixel aperture area.
Solution Approach 2:
The patent changes the impurity concentration parameter in the drain region by introducing an LCIR with intermediate impurity concentration between the channel region and high-concentration impurity region. This parameter change effectively suppresses leak current while maintaining the transistor dimensions required for pixel aperture area.
2Object-generated harmful factors
If LDD regions are provided on both sides of channel regions to suppress leak current, then leak current is reduced, but manufacturing precision is affected by variances
Solution Approach 1:
The patent focuses the leak current suppression function to a specific LCIR location between the channel region and high-concentration impurity region, rather than symmetric LDD regions on both sides. This localized approach reduces sensitivity to manufacturing variances in gate electrode alignment while achieving effective leak current suppression.
Solution Approach 2:
The patent employs asymmetric impurity concentration distribution by placing the LCIR specifically between the channel region and high-concentration impurity region, rather than symmetric LDD regions. This asymmetric configuration provides more stable leak current suppression performance across manufacturing variations.
3Object-generated harmful factors
If LDD regions are provided to suppress leak current, then leak current is reduced, but ON resistance increases
Solution Approach 1:
The patent applies local quality by confining the low-concentration impurity region to a specific location between the channel and high-concentration region, rather than extending LDD regions broadly. This localized approach minimizes the impact on ON resistance while achieving leak current suppression through targeted impurity concentration modification.
Solution Approach 2:
The patent carefully controls the impurity concentration parameter in the LCIR within a specific range (1×10^19 to 1×10^21 atoms/cm³) to achieve leak current suppression while minimizing degradation of ON resistance. The controlled parameter change balances both performance requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased length of the second region effectively suppresses leak current, minimizing display defects and brightness variations across the display section, thereby maintaining optimal display capability.
Implementation Method 1
a second region formed between the first channel region and the second channel region and having an impurity concentration which is equal to an impurity concentration of the first region... The second region has a length of 5 μm or more, which is greater than a length of each of the first region and the third region
Data Source
AI summary
According to one embodiment, a display device includes a semiconductor including a first channel region, a second channel region, a source region, a drain region, a first region located between the source region and the first channel region, a second region formed between the first channel region and the second channel region, and a third region located between the drain region and the second channel region, wherein the second region has a length of 5 μm or more, which is greater than a length of each of the first region and the third region.