Thin Film Transistor Manufacturing Method Using Selective Impurity Doping

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Solution Overview

Problem

The manufacturing process of display devices with n-type and p-type thin film transistors is cumbersome due to the need for separate impurity doping steps and masking processes, increasing the complexity and number of steps required.

Innovation Solution

A display device and manufacturing method where n-type and p-type thin film transistors are formed with a metal layer made of a different material on the gate-insulation-film side, and impurity regions with varying concentrations are created between the channel and source/drain regions, allowing for reduced processing steps by optimizing the injection and etching processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate impurity doping steps are used for n-type and p-type thin film transistors, then the transistors can be formed with correct conductive types, but the manufacturing process becomes cumbersome and complex

Engineering Contradiction:
Improvetransistor conductive type accuracyVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the formation of n-type and p-type thin film transistors into a single integrated manufacturing process. By forming both types of transistors simultaneously using the same impurity doping step without requiring separate masking processes, the method reduces manufacturing complexity while ensuring correct conductive types through selective region formation during the integrated process

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates a universal manufacturing process that handles both n-type and p-type thin film transistor formation using the same sequence of steps. The process uses a single impurity doping step that serves multiple functions: forming n-type regions in some areas and p-type regions in other areas, eliminating the need for separate specialized processes for each transistor type

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If masking processes are used to selectively form impurity regions, then the correct conductive type can be achieved, but the number of manufacturing steps increases

Engineering Contradiction:
Improveconductive type selectivityVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts and eliminates the masking step from the traditional manufacturing process. By using a different approach that relies on selective region formation through the integrated process design rather than physical masking, the method removes an entire step from the manufacturing sequence, thereby improving productivity while maintaining conductive type selectivity through alternative process control

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary actions in the process design to enable selective impurity region formation without masking. By pre-configuring the structure and using selective etching or deposition patterns before the impurity doping step, the process establishes which regions will receive n-type or p-type doping in a single step, eliminating the need for subsequent masking operations

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7952102B2Display device and manufacturing method thereof
Publication Date: 2011.05.31 MAGNOLIA PURPLE CORP
  • US7952102B2 patent drawing
  • US7952102B2 patent drawing
  • US7952102B2 patent drawing

AI summary

In a display device which forms thin film transistors on a substrate, the thin film transistor includes an n-type thin film transistor and a p-type thin film transistor, a gate electrode of one thin film transistor out of the n-type thin film transistor and the p-type thin film transistor forms a metal layer made of a material different from the gate electrode on a gate-insulation-film side thereof, and an LDD layer is formed over a semiconductor layer of at least one of the n-type thin film transistor and the p-type thin film transistor.