TFT Semiconductor Layer Edge Curvature for Dielectric Breakdown
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Solution Overview
Problem
Existing methods for forming semiconductor layers in thin film transistors (TFTs) face challenges in achieving precise control over layer thickness and edge geometry, leading to non-uniform gate insulating films and increased risk of dielectric breakdown, especially when forming multiple layers at short intervals.
Innovation Solution
A semiconductor layer with a side surface that includes a rounded portion and an inclining flat face, where the angle of the tangential line to the side surface increases monotonously from the top surface to the bottom surface, and a method involving two etching steps with different etching rates and gas compositions to form the layer, allowing for precise control over the edge geometry and reducing etching shift.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate insulating film is made thinner to improve TFT switching characteristics, then the switching performance is improved, but the risk of dielectric breakdown increases due to non-uniform thickness at the edge of the semiconductor layer
Solution Approach 1:
The semiconductor layer edge is formed with a rounded shape having a specific radius of curvature, which eliminates the sharp corner that causes electric field concentration. This curved geometry allows the gate insulating film to be uniformly thin across the entire semiconductor layer surface, including the edge region, thereby improving switching characteristics while preventing dielectric breakdown.
Solution Approach 2:
The invention changes the geometric parameter of the semiconductor layer edge from a sharp corner to a curved shape with a controlled radius of curvature. This parameter change modifies the electric field distribution, enabling the gate insulating film thickness to be reduced uniformly without creating high-field regions that would cause breakdown.
2Ease of manufacture
If conventional etching methods are used to form the semiconductor layer, then the manufacturing process is simple, but the etching shift is large making it difficult to form semiconductor layers in sufficiently minute sizes
Solution Approach 1:
The invention changes the etching process parameters, specifically using a mixed gas of CF4 and O2 with a controlled oxygen partial pressure ratio. This parameter change modifies the etching chemistry to achieve both anisotropic etching (for vertical profiles) and rounded edge formation, reducing etching shift while maintaining process simplicity.
Solution Approach 2:
The invention uses a composite gas mixture of CF4 and O2 in specific proportions during the etching process. This composite approach combines the advantages of both gases: CF4 provides strong etching power for silicon, while O2 helps form a protective oxide layer that enables rounded edge formation and reduces lateral etching, thereby reducing etching shift.
3Manufacturing precision
If the semiconductor layer edge is tapered to suppress gate insulating film thickness change, then the film uniformity is improved, but the electric field concentration at the edge still causes dielectric breakdown
Solution Approach 1:
Instead of a tapered (linearly sloping) edge, the invention employs a rounded edge with a specific radius of curvature. This curved geometry distributes the electric field more uniformly along the edge, eliminating the concentration effect that occurs with tapered shapes, while simultaneously enabling uniform gate insulating film thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses dielectric breakdown and enables the formation of semiconductor layers in a minute size with improved uniformity, enhancing the reliability and performance of TFTs by allowing for thinner gate insulating films without compromising withstand voltage.
Implementation Method 1
performing first etching of removing a part of the semiconductor film using the photoresist layer as a mask, thereby forming an island-like semiconductor layer; performing second etching, after the first etching, of removing at least a part of each of edges of the island-like semiconductor layer and the photoresist layer
Data Source
AI summary
A semiconductor layer (100) according to the present invention includes a top surface (100o), a bottom surface (100u) and a side surface (100s). In a portion of the side surface (100s) which is in the vicinity of a border with the top surface (100o), a tangential line (T1) to the portion is inclined with respect to the normal to the bottom surface (100u). In a certain portion of the side surface (100s) which is farther from the top surface (100o) than the portion in the vicinity of the border, an angle made by a tangential line (T2) to the certain portion and a plane defined by the bottom surface (100u) is larger than an angle made by the tangential line (T1) to the portion in the vicinity of the border and the plane defined by the bottom surface (100u).