Thin-Film Transistor Semiconductor Laminate for Off-Leak Current Reduction
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Solution Overview
Problem
The existing thin-film transistors in display devices, particularly those with a laminate structure of amorphous and crystalline semiconductor layers, suffer from increased off-leak current due to contact between source and drain electrodes and the crystalline semiconductor layer, which hampers the improvement of display contrast.
Innovation Solution
The design incorporates a thin-film transistor structure where the semiconductor layer is formed as a laminate of crystalline and amorphous semiconductor layers, with electrodes connected through holes in an insulating film, and the electrodes are made of doped semiconductor and metal layers, ensuring electrical connection without direct contact on the side walls, thereby reducing off-leak current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the source electrode and drain electrode are formed to extend along the side wall surface of the crystalline semiconductor layer, then the electrical connection is improved, but the off-leak current increases
Solution Approach 1:
The patent introduces an insulating film as an intermediary layer between the source/drain electrodes and the crystalline semiconductor layer. This insulating film prevents direct contact and electrical leakage while maintaining proper electrical connection through controlled interfaces, thus resolving the contradiction between electrical connection quality and off-leak current reduction.
Solution Approach 2:
The patent transitions from a planar electrode configuration to a three-dimensional structure where electrodes extend along side wall surfaces but are separated by an insulating film. This dimensional change allows electrical connection to be maintained through vertical interfaces while preventing lateral leakage current paths.
2Stability of the object's composition
If the laminate structure of amorphous and crystalline semiconductor layers is used, then the threshold voltage variation is reduced, but the manufacturing complexity increases
Solution Approach 1:
The patent utilizes phase transition and material property changes by forming a crystalline semiconductor layer through laser annealing of an amorphous semiconductor layer. This parameter change (from amorphous to crystalline state) improves threshold voltage stability while the subsequent formation of an insulating film simplifies the overall manufacturing process by preventing leakage issues.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively minimizes off-leak current, enhancing the contrast and performance of display devices by preventing electrical contact between the electrodes and the semiconductor layer, thus improving image quality.
Implementation Method 1
The semiconductor layer is formed of a laminate obtained by sequentially laminating a crystalline semiconductor layer and an amorphous semiconductor layer
Data Source
AI summary
A display device includes a plurality of thin-film transistors formed on a substrate on which a display area is formed. The display device also includes a gate electrode, a gate insulating film formed so as to cover the gate electrode, an semiconductor layer in an island shape formed on an upper surface of the gate insulating film so as to superimpose the gate electrode without protruding from the gate electrode when viewed planarly, an insulating film formed so as to cover the semiconductor layer, and a pair of electrodes electrically connected to the semiconductor layer respectively through a pair of through holes that are formed at the insulating film. The semiconductor layer is formed by sequentially laminating a crystalline semiconductor layer and an amorphous semiconductor layer. The pair of electrodes is respectively formed by sequentially laminating a semiconductor layer doped with impurities and a metal layer.