TFT Active Substrate Shielding Electrode for Hot Carrier Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing critical dimensions in thin film transistor manufacturing lead to enhanced negative influences of the electric field on the quality of thin film transistors, resulting in a hot carrier effect that degrades active devices.
Innovation Solution
An active device substrate is designed with a shielding electrode that overlaps the second lightly doped region of the semiconductor layer, dispersing the electric field between the heavily doped region and the gate, thereby reducing the hot carrier effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the distance between different electrodes of the thin film transistor is reduced to manufacture smaller thin film transistors, then the critical dimensions are reduced and device size is decreased, but the negative influence of the electric field between different electrodes on the quality of the thin film transistors is increased
Solution Approach 1:
A shielding electrode is introduced as an intermediary element between the gate electrode and the source/drain electrodes. This shielding electrode overlaps the lightly doped region in the semiconductor layer and acts as a mediator to disperse and reduce the electric field intensity between the gate and source/drain electrodes, thereby mitigating the hot carrier effect while maintaining the reduced critical dimensions
Solution Approach 2:
The shielding electrode is positioned in the vertical dimension (overlapping the semiconductor layer) rather than only in the planar dimension. By extending the electrode structure into the third dimension and overlapping the lightly doped region, the electric field distribution is modified in the vertical direction, reducing the field intensity at critical interfaces without increasing the planar device footprint
2Reliability
If a shielding electrode is added to disperse the electric field and reduce the hot carrier effect, then the quality and reliability of the active device is improved, but the device complexity and manufacturing process are increased
Solution Approach 1:
The shielding electrode is merged with the existing gate electrode structure, forming an integrated conductive layer. The shielding electrode and gate electrode are deposited in the same manufacturing step using the same sputtering process, sharing the same gate electrode pattern definition. This merging approach adds the shielding function without requiring separate fabrication processes or additional alignment steps
Solution Approach 2:
The gate electrode structure serves dual functions: as the control electrode for the transistor operation and as a shielding electrode to reduce the hot carrier effect. The same conductive layer and pattern definition process are used to create both the gate electrode and the shielding electrode, making the structure multi-functional and reducing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The introduction of the shielding electrode effectively mitigates the hot carrier effect, improving the performance and longevity of active devices by reducing the electric field impact, while also simplifying the manufacturing process by sharing conductive layers.
Implementation Method 1
an electric field between the second heavily doped region and the first gate may be dispersed by the shielding electrode
Data Source
AI summary
An active device substrate includes a substrate, a first semiconductor layer, a gate insulating layer, a first gate, a first source, a first drain and a shielding electrode. The first semiconductor layer includes a first heavily doped region, a first lightly doped region, a channel region, a second lightly doped region, and a second heavily doped region that are sequentially connected. The first gate is located on the gate insulating layer and overlaps the channel region. The first source is electrically connected to the first heavily doped region. The first drain is electrically connected to the second heavily doped region. The shielding electrode overlaps the second lightly doped region in a normal direction of the substrate.


