Triple-Layer TFT Signal Lines for Oxidation Resistance
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Solution Overview
Problem
The existing thin film transistor array panels for liquid crystal displays face challenges with oxidation or corrosion of signal lines, particularly when aluminum is used, and the manufacturing process is complex and costly due to the need for multiple masks and steps in photolithography.
Innovation Solution
A thin film transistor array panel with a triple-layered structure for data lines, drain electrodes, and signal transmitting lines, using amorphous indium tin oxide or indium zinc oxide for the lower and upper layers and chromium, molybdenum, or titanium for the intermediate layer, along with a gate line structure that includes chromium or aluminum alloys, to reduce signal delay and prevent oxidation or corrosion. The manufacturing method involves depositing and patterning these layers with a reduced number of masks to simplify the process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If aluminum is used for signal lines to reduce resistance, then electrical conductivity is improved, but oxidation and corrosion resistance deteriorates
Solution Approach 1:
The patent employs a composite wiring structure consisting of multiple layers with different materials. Specifically, it uses a lower layer (first wiring layer) made of aluminum or aluminum alloy for low resistance, an intermediate layer (second wiring layer) made of chromium, molybdenum, or titanium for oxidation resistance, and an upper layer (third wiring layer) made of aluminum or aluminum alloy for electrical conductivity. This composite structure resolves the contradiction by combining materials with complementary properties.
2Manufacturing precision
If additional photo-masks are added to pattern thin layers, then manufacturing precision is improved, but manufacturing complexity and time increase
Solution Approach 1:
The patent merges the patterning operations for multiple thin layers into a single photolithography process. By forming all patterns of the thin layers simultaneously using one photo-mask, the method eliminates the need for separate exposing, developing, and cleansing steps for each layer, thereby reducing manufacturing complexity while maintaining precision.
Solution Approach 2:
The single photo-mask designed for this invention serves multiple functions: it patterns the gate layer, data layer, and semiconductor layer all at once. This multi-functional approach replaces what would traditionally require multiple specialized masks, simplifying the overall manufacturing process.
Data Source
AI summary
A thin film transistor array panel including a substrate, a gate line and a gate-layer signal transmitting line of a gate driving circuit portion formed on the substrate, a gate insulating layer formed on the gate line and the gate-layer signal transmitting line and having a first contact hole exposing a portion of the gate-layer signal transmitting line, a semiconductor layer formed on the gate insulating layer, a data line including a source electrode, and a drain electrode formed on the gate insulating layer and the semiconductor layer, a data-layer signal transmitting line of the gate driving circuit portion formed on the gate insulating layer and connected to the gate-layer signal transmitting line through the first contact hole, a pixel electrode connected to the drain electrode, and a passivation layer formed on the data line, the drain electrode, and the data-layer signal transmitting line of the driving circuit portion. The data line, the drain electrode, and the data-layer signal transmitting line have a triple-layered structure including a lower layer, an intermediate layer, and an upper layer. The lower layer is made of a same layer as the pixel electrode.