TFT Organic Side Wall Silsesquioxane Resin
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing thin film transistors (TFTs) face challenges in reducing manufacturing processes and processing time while maintaining performance, particularly when the channel length is decreased, leading to off-current issues and short channel effects.
Innovation Solution
The implementation of a thin film transistor with an organic side wall layer made of silsesquioxane resin, which includes a semiconductor layer with a channel region, lightly doped drain region, source region, and drain region, and a gate electrode overlapping the channel region, where the organic side wall layer extends to the upper surface of the gate electrode and includes the same dopant material as the source and drain regions, simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the channel length is decreased to improve transistor performance and reduce device size, then the transistor can achieve higher integration density and faster switching speed, but off-current increases and short channel effects worsen
Solution Approach 1:
The patent applies local quality by creating a lightly doped drain (LDD) region with specific dopant concentration gradients in the semiconductor layer. This localized doping structure modifies the electric field distribution specifically in the drain region, reducing off-current and short channel effects without affecting the overall channel length reduction for high integration density
Solution Approach 2:
The organic side wall layer acts as an intermediary element between the gate electrode and the semiconductor layer. This side wall layer provides precise lateral masking during dopant injection, enabling accurate formation of the LDD region that controls off-current while maintaining the reduced channel length geometry
2Reliability
If multiple dopant injection steps are used to form LDD region and source/drain regions to prevent off-current, then transistor performance improves, but manufacturing process complexity and processing time increase
Solution Approach 1:
The patent applies preliminary action by forming the organic side wall layer on the gate electrode before any dopant injection steps. This pre-formed side wall structure serves as a lateral mask that defines the LDD region boundaries, enabling subsequent dopant injections to precisely create the desired doping profile in a single or reduced number of steps
Solution Approach 2:
The organic side wall layer provides self-service by automatically serving as a lateral masking structure for dopant injection. The side wall's geometry and position self-definedly control the dopant diffusion regions, eliminating the need for separate photolithography masking steps and reducing process complexity while maintaining precise LDD formation
3Manufacturing precision
If traditional inorganic side wall layers are used to mask dopant injection, then manufacturing precision can be maintained, but processing time and thermal budget increase due to additional formation and removal steps
Solution Approach 1:
The patent extracts the masking function from traditional inorganic side wall materials and implements it using an organic material layer. This organic side wall layer can be directly formed by coating and baking organic composition, eliminating the need for complex inorganic side wall formation and subsequent removal steps, thereby reducing processing time while maintaining dopant injection precision
Solution Approach 2:
The patent changes the material parameter from inorganic to organic for the side wall layer. This parameter change allows the side wall to be formed through simple coating and thermal treatment processes rather than requiring sputtering, evaporation, or chemical vapor deposition followed by etching and removal, significantly reducing the thermal budget and processing time while maintaining adequate masking precision
Data Source
AI summary
A thin film transistor (TFT), a method of manufacturing the TFT, and a display apparatus including the TFT, the TFT including a substrate; a semiconductor layer on the substrate, the semiconductor layer including a channel region, a lightly doped drain (LDD) region, a source region, and a drain region; a gate insulating layer covering the semiconductor layer; a gate electrode overlapping with the channel region such that the gate insulating layer is interposed between the gate electrode and the channel region; and an organic side wall layer on a side surface of the gate electrode, wherein the organic side wall layer includes a silsesquioxane resin.


