Thin Film Transistor Spacer Layer Parasitic Capacitance

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Solution Overview

Problem

The use of a metal light-shielding layer in thin film transistors leads to parasitic capacitance between the light-shielding layer and the active layer, increasing leakage current and affecting electrical properties.

Innovation Solution

Incorporating a spacer layer between the active layer and the metal light-shielding layer to increase the distance between them, thereby reducing or eliminating parasitic capacitance and improving electrical properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a metal light-shielding layer is provided to prevent light from being irradiated onto the active layer, then light shielding effectiveness is improved, but parasitic capacitance is generated between the light-shielding layer and the active layer, causing leakage current to increase

Engineering Contradiction:
Improvelight shielding effectivenessVSAvoidleakage current
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

An insulating layer is introduced as an intermediary between the metal light-shielding layer and the active layer. This insulating layer acts as a mediator that prevents direct electrical interaction while maintaining the light-shielding function, thereby eliminating parasitic capacitance generation and reducing leakage current.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure is segmented by dividing the original direct contact interface into separate functional layers: the metal light-shielding layer, the insulating layer, and the active layer. This segmentation allows each layer to perform its specific function independently while preventing harmful interactions between them.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If a light-shielding layer is formed of metal material to effectively block light, then light shielding performance is improved, but parasitic capacitance is generated affecting the electrical properties of the thin film transistor

Engineering Contradiction:
Improvelight shielding performanceVSAvoidelectrical properties
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The insulating layer serves as an intermediary that preserves the electrical properties of the thin film transistor by preventing parasitic capacitance formation, while allowing the metal light-shielding layer to maintain its superior light shielding performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure employs a composite material approach by combining the metal light-shielding layer with an insulating layer. This composite structure integrates the optical shielding advantages of metal with the electrical insulation properties of the insulating material, achieving both light shielding effectiveness and electrical property stability.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The spacer layer effectively reduces parasitic capacitance, minimizing leakage current and enhancing the electrical performance of the thin film transistor.

Implementation Method 1

a parasitic capacitance is generated between the light-shielding layer and the active layer. This parasitic capacitance causes the leakage current of the thin film transistor to increase

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentEP3621120B1Thin film transistor and preparation method therefor, array substrate and preparation method therefor
Publication Date: 2023.05.03 BOE TECHNOLOGY GROUP CO LTD
  • EP3621120B1 patent drawingFigure 1a~2a
  • EP3621120B1 patent drawingFigure 2b~3
  • EP3621120B1 patent drawingFigure 4~6b

AI summary

A thin film transistor, a manufacturing method of the thin film transistor, an array substrate and a manufacturing method of the array substrate are provided. The thin film transistor includes a base substrate (100), a metal light-shielding layer (200) and a first active layer (500) which are on the base substrate (100), and a spacer layer (400) between the first active layer (500) and the metal light-shielding layer (200); the first active layer (500) includes a channel region (530), and the spacer layer (400) is between the channel region (530) and the metal light-shielding layer (200). The spacer layer (400) increases a distance between the channel region (530) of the first active layer (500) and the metal light-shielding layer (200) to reduce or eliminate a parasitic capacitance between the channel region (530) of the first active layer (500) and the metal light-shielding layer (200), and improves electrical properties of the thin film transistor.