Thin-Film Transistor Stress Liners for Higher Channel Mobility
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Solution Overview
Problem
Current thin film transistors (TFTs) face challenges in enhancing on-current due to limited mechanical stress induction methods, which affect the mobility and performance of semiconductor channels.
Innovation Solution
The introduction of metallic liners that induce compressive or tensile stress in the end portions of semiconducting material layers, either through deposition of stress-generating metallic materials or by implanting dopants to alter the lattice constant, thereby generating mechanical stress within the channel portions of TFTs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metallic liners are deposited to induce mechanical stress in semiconductor channels, then charge carrier mobility is enhanced, but device complexity increases
Solution Approach 1:
The source and drain regions are segmented into multiple layers including a metallic liner layer deposited between the semiconductor material and the source/drain contact. This segmentation allows the metallic liner to specifically induce mechanical stress in the channel portion without affecting other device regions, thereby enhancing charge carrier mobility while isolating the complexity to a specific functional layer.
Solution Approach 2:
The metallic liner is applied locally only to the source and drain regions adjacent to the channel, rather than uniformly across the entire device. This localized application creates mechanical stress precisely where needed in the channel to enhance mobility, while minimizing the overall device complexity and material usage.
2Reliability
If dopant implantation is used to alter lattice constant and generate mechanical stress, then on-current is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The lattice constant of the semiconductor material is changed by implanting dopants into the source and drain regions. This parameter change alters the crystal structure to generate mechanical stress in the channel, thereby enhancing on-current. The dopant concentration and distribution are controlled to achieve the desired lattice constant modification while managing manufacturing precision requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively enhances the on-current of TFTs by increasing charge carrier mobility through controlled mechanical stress, improving the performance and efficiency of semiconductor channels.
Implementation Method 1
each of the source structure and the drain structure comprises a metallic liner that generates tensile stress or compressive stress within end portions of the semiconducting material layer by changing a lattice constant of the end portions of the semiconducting material layer
Implementation Method 2
The metallic liner induces compressive stress within the end portions of each semiconducting material layer. The compressive stress within the end portions of each semiconducting material layer induces tensile stress between the end portions of each semiconducting material layer, i.e., within each channel portion of the thin film transistor
Implementation Method 3
The metallic liner can be formed by implanting dopants into portions of each semiconducting material layer that underlie respective source and drain structures
Data Source
AI summary
A planar insulating spacer layer can be formed over a substrate, and a combination of a semiconducting material layer, a thin film transistor (TFT) gate dielectric layer, and a gate electrode can be formed over the planar insulating spacer layer. A dielectric matrix layer is formed thereabove. A source-side via cavity and a drain-side via cavity can be formed through the dielectric matrix layer over end portions of the semiconducting material layer. Mechanical stress can be generated between the end portions of the semiconducting material layer by changing a lattice constant of end portions of the semiconducting material layer. The mechanical stress can enhance the mobility of charge carriers in a channel portion of the semiconducting material layer.