Thin Film Transistor Sub Active Layer Electron Mobility
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Solution Overview
Problem
Conventional thin film transistors (TFTs) face challenges in achieving high electron mobility due to limitations in active layer materials, such as instability, low deposition rates, and non-uniformity, which hinder the development of high-resolution and fast-response liquid crystal display (LCD) technologies.
Innovation Solution
The introduction of a sub active layer between the gate and main active layers in a TFT structure, formed without an annealing process, enhances electron mobility by providing an additional electrical path and reducing electrical resistance, while also eliminating the need for additional mask processes, thereby decreasing manufacturing time and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional amorphous silicon or micro-crystal silicon is used as active layer material, then the TFT can be manufactured with existing processes, but electron mobility is limited and performance is insufficient for high-resolution displays
Solution Approach 1:
The patent uses a composite structure consisting of a main active layer and a sub active layer. The sub active layer is formed of InGaZnO4 material while the main active layer can be conventional amorphous silicon or micro-crystal silicon. This composite structure enables high electron mobility (exceeding 10 cm²/Vs) without requiring complete replacement of existing manufacturing processes, thus resolving the contradiction between performance improvement and manufacturing ease.
2Reliability
If InGaZnO4 sub active layer is introduced to improve electron mobility, then electron mobility exceeds 10 cm²/Vs, but the manufacturing process becomes more complex
Solution Approach 1:
The patent segments the active layer into two distinct parts: a main active layer and a sub active layer. The sub active layer is positioned between the gate electrode and the main active layer, creating a layered structure that provides high electron mobility pathways while keeping the overall device architecture manageable and compatible with existing TFT manufacturing processes.
Solution Approach 2:
The sub active layer is strategically positioned only in the region where high electron mobility is most beneficial - between the gate electrode and the main active layer in the channel formation region. This localized approach provides high performance where needed without unnecessarily complicating the entire device structure.
3Reliability
If additional sub active layer is added to provide electrical path, then electron mobility improves, but manufacturing time and costs increase
Solution Approach 1:
The patent combines the formation of the sub active layer with existing manufacturing steps. The sub active layer is formed using sputtering or atomic layer deposition (ALD) processes that can be integrated into the existing TFT fabrication sequence, allowing simultaneous formation of multiple layers without requiring separate dedicated process steps, thus improving manufacturing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases electron mobility in TFTs without the need for annealing, reduces manufacturing time and costs, and improves the performance of the final TFT by providing an additional electrical path and protecting the main active layer during chemical vapor deposition processes.
Implementation Method 1
a sub active layer in electrical connection with the main active layer... provides an additional electrical path and reducing electrical resistance
Implementation Method 2
the sub active layer may be formed by a sputtering process... the channel protective layer may be formed by a sputtering process
Data Source
AI summary
A thin film transistor includes a gate electrode on a substrate, a main active layer in electrical connection with the gate electrode and including an exposed channel portion, a source electrode in electrical connection with the main active layer, a drain electrode which is spaced apart from the source electrode and in electrical connection with the main active layer, and a sub active layer in electrical connection to the main active layer.