TFT Substrate Mask Reduction via Collective Etching
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Solution Overview
Problem
The high manufacturing cost and yield reduction in liquid crystal display devices due to the large number of photo masks used and disconnection defects in video signal lines, which complicates process design and alignment accuracy.
Innovation Solution
A manufacturing method that reduces the number of photo masks by forming source electrodes, video signal lines, and semiconductor layers through collective etching treatment after pixel electrodes, with overlapping metal and semiconductor layers, and forming opening portions in the second insulation layer to facilitate easy alignment and connection, thereby reducing disconnection defects and simplifying the process design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If 6 to 8 sheets of photo masks are used for manufacturing the TFT substrate, then the manufacturing process can be completed with conventional methods, but the manufacturing cost increases
Solution Approach 1:
The patent combines multiple patterning operations into a single photo mask by strategically designing the mask pattern to form pixel electrodes, video signal lines, and source-drain lines simultaneously. This merging of multiple manufacturing steps into one reduces the number of photo masks from 6-8 sheets to fewer masks, thereby lowering manufacturing cost while maintaining process completeness
Solution Approach 2:
The photo mask is designed to serve multiple functions: it patterns pixel electrodes, video signal lines, and source-drain lines in a single exposure step. This multi-functional approach eliminates the need for separate masks for each component, reducing the total number of masks required and associated manufacturing costs
2Device complexity
If pixel electrodes are formed after video signal lines with direct connection, then the number of photo masks is reduced, but disconnection defects of video signal lines increase
Solution Approach 1:
The patent forms video signal lines before pixel electrodes, and establishes protective structures (such as insulation layers or barrier patterns) in advance to prevent etchant damage. This preliminary action ensures that when pixel electrodes are subsequently formed, the video signal lines are already protected against dissolution, maintaining connection reliability while keeping the process simple
Solution Approach 2:
The patent introduces protective measures beforehand to cushion against potential etchant damage to video signal lines. This may include forming protective insulation layers, using etch-selective materials, or designing geometric features that prevent etchant penetration, thereby preventing disconnection defects before they can occur
3Length of moving object
If scanning signal lines are formed after semiconductor layers, then the semiconductor layer width is reduced, but mask alignment accuracy requirements become stricter
Solution Approach 1:
The patent segments the patterning process into distinct stages where different features are formed at appropriate times. By forming scanning signal lines at a specific stage and using separate patterning steps for different components, the method avoids the need for extremely tight alignment between masks, reducing the stringency of alignment accuracy requirements while maintaining proper feature dimensions
Data Source
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AI summary
A liquid crystal display device having scanning signal lines (GL) and gate electrodes (GD) on an insulation substrate (SUB1), a first insulation layer (PAS1), pixel electrodes (MIT) and a semiconductor layer (ASI). A metal layer (M) is formed over the semiconductor layer (ASI). Video signal lines (DL), drain electrodes (SD1) and source electrodes (SD2) are formed of the stacked portion of the metal layer and the semiconductor layer. The second insulation layer (PAS2) is formed over the video signal lines (DL), the drain electrodes (SD1), the source electrodes (SD2) and the pixel electrodes (MIT), while the contact holes (TH) are formed. The common electrodes (CT), having slits (SL), are formed over the second insulation layer (PAS2). The pixel electrode (MIT) and the source electrode (SD2) are connected with each other in a conductive state.