TFT Substrate Layout to Minimize Electrostatic Discharge Defects
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Solution Overview
Problem
The manufacturing of thin-film transistor substrates is hindered by electrostatic discharge, which causes point defects during the formation of gate electrode lines and image signal lines, leading to low yield in display devices.
Innovation Solution
The shapes of semiconductor patterns and gate electrode lines are optimized to minimize the value of K, calculated using specific capacitor equations, to reduce electrostatic discharge when the substrate is mounted on a metal table, and a CAD program is used to design these shapes and warn against potential discharge points.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate electrode lines and image signal lines are formed on the thin-film transistor substrate, then the display device functionality is improved, but electrostatic discharge occurs causing point defects and reducing manufacturing yield
Solution Approach 1:
The patent applies preliminary action by forming a ground electrode layer beneath the gate electrode lines and image signal lines before completing the wiring structure. This ground layer is prepared in advance to provide electrostatic shielding, preventing electrostatic discharge from damaging the display device during subsequent manufacturing processes or operation.
Solution Approach 2:
The ground electrode layer serves as an intermediary element between the signal lines and the substrate. It mediates electrostatic interactions by providing a reference potential and shielding the sensitive gate electrode lines and image signal lines from electrostatic discharge, thus protecting the device functionality while allowing the wiring structure to be formed.
2Ease of manufacture
If conventional wiring structures are used, then manufacturing process is simple, but point defects occur due to electrostatic discharge leading to low yield
Solution Approach 1:
The ground electrode layer is formed preliminarily in the manufacturing process, before the complete wiring structure is finalized. This preliminary structure provides electrostatic protection early in the process, preventing point defects during subsequent steps while maintaining a relatively straightforward manufacturing sequence that integrates the ground layer formation with existing process steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces defect rates due to electrostatic discharge, thereby improving the manufacturing yield of thin-film transistor substrates and display devices by stabilizing the production process.
Implementation Method 1
capacitor equations
Implementation Method 2
electrostatic discharge, which causes point defects during the formation of gate electrode lines and image signal lines
Data Source
AI summary
A thin-film transistor substrate includes a pixel region where gate electrode lines are arranged on an insulating substrate sandwiching semiconductor layer patterns and a gate insulator with the insulating substrate, wherein shapes of the semiconductor patterns and the gate electrode lines are set so that a value of K obtained by the following equation is smaller than a first set value when the thin-film transistor substrate is mounted on a metal table:K=(L/Ce)×{Ca/(Ca+Cb)}×S where Ca represents a capacitor between each of the semiconductor layer patterns and the metal table, Cb represents a capacitor between each of the semiconductor layer patterns and the gate electrode lines, Ce represents a capacitor between each of the gate electrode lines and the metal table, L represents a length of each of the gate electrode line, and S represents a substrate surface area that one of the gate electrode lines are in charge of per unit length.