Thin-Film Transistor Substrate Layout for Lower Leakage Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing thin-film transistor substrates in organic light emitting display apparatuses face issues with short channel effects and hot electron effects, leading to increased leakage current and deteriorated off-current characteristics due to strong electric fields, which are not effectively addressed by current technologies.
Innovation Solution
A thin-film transistor substrate design with a semiconductor layer comprising a first and second conductive region and a first semiconductor region, where the first width of the semiconductor region is greater than the lower electrode, and a non-crystallization and crystallization region configuration, along with a specific electrode overlap and separation distance, to weaken the electric field and reduce leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional thin-film transistor structure with gate electrode overlapping the semiconductor layer is used, then the transistor can control light emission, but strong electric field effects (short channel effect and hot electron effect) occur causing increased leakage current and deteriorated off-current characteristics
Solution Approach 1:
The invention divides the semiconductor layer into distinct regions: a first semiconductor region forming the channel and second semiconductor regions forming source and drain regions. This segmentation allows different areas to have different functions, with the channel region optimized for current control and source/drain regions optimized for charge injection, thereby reducing short channel effects and leakage current
Solution Approach 2:
The invention applies different doping concentrations to different regions of the semiconductor layer. The source and drain regions are doped with impurities at a first concentration while the channel region has a second concentration, creating local quality variations that optimize electrical characteristics and reduce harmful electric field effects in specific areas
2Reliability
If the semiconductor layer width is increased to reduce short channel effects, then off-current characteristics improve, but the device area and manufacturing complexity increase
Solution Approach 1:
The invention extends the semiconductor layer in the width direction beyond the gate electrode edges, creating a structure where the semiconductor layer has different dimensions in different directions. This dimensional extension allows the channel length to be effectively increased without proportionally increasing the area, thereby reducing short channel effects while maintaining compact device footprint
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design enhances electrical characteristics by reducing leakage current and improving off-current characteristics without increasing the number of mask processes, thereby improving the performance and reliability of the thin-film transistor substrate.
Implementation Method 1
The semiconductor layer may include a non-crystallization region including at least part of the second channel region and a crystallization region including the second conductive region
Data Source
AI summary
Provided are a thin-film transistor substrate that has enhanced electrical characteristics, such as off-current characteristics of a thin-film transistor, without increasing the number of mask processes, a display apparatus, and a method of manufacturing the thin-film transistor substrate. The thin-film transistor substrate includes: a semiconductor layer including a first conductive region, a second conductive region, and a first semiconductor region; a lower electrode disposed on the semiconductor layer and at least partially overlapping the first semiconductor region; and an upper electrode disposed on the lower electrode and at least partially overlapping the first semiconductor region, a first boundary between the first semiconductor region and the first conductive region coincides with an edge of the upper electrode, and a second boundary between the first semiconductor region and the second conductive region coincides with an edge of the lower electrode or an edge of the upper electrode.