TFT Substrate Metal Oxide Semiconductor Layer for Leakage Reduction
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Solution Overview
Problem
Conventional thin-film transistor (TFT) substrate structures using amorphous silicon face challenges in forming ohmic contacts with metals, leading to high contact resistance and increased leakage current, which affects current efficiency and reliability.
Innovation Solution
A TFT substrate structure is developed with a metal oxide semiconductor layer, specifically indium gallium zinc oxide (IGZO), replacing the N-type heavily-doped layer, allowing for a lower potential barrier with metals and reducing leakage current by forming an ohmic contact without additional ion doping, and incorporating defects to trap holes and prevent current leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an N-type heavily-doped layer is formed in amorphous silicon to reduce contact resistance, then current efficiency is improved, but leakage current increases due to hole-conducting channel formation
Solution Approach 1:
A metal oxide semiconductor layer (e.g., IGZO) is introduced as an intermediary layer between the amorphous silicon layer and the metal electrode. This intermediary layer has a lower potential barrier with metals, enabling ohmic contact formation without requiring heavy doping of the amorphous silicon, thus avoiding the generation of hole-conducting channels and reducing leakage current.
Solution Approach 2:
The structure employs a composite material system combining amorphous silicon with metal oxide semiconductor (such as indium gallium zinc oxide). This composite approach leverages the advantages of both materials: amorphous silicon provides the semiconductor functionality while the metal oxide semiconductor provides low contact resistance and low leakage current characteristics.
2Reliability
If ion doping is performed to create N-type heavily-doped zones, then ohmic contact is achieved, but the process complexity and manufacturing steps increase
Solution Approach 1:
The invention extracts the doping step from the contact formation process by replacing the N-type heavily-doped amorphous silicon layer with an undoped or lightly-doped metal oxide semiconductor layer. This eliminates the need for complex ion doping processes while achieving the same ohmic contact functionality.
3Productivity
If the amorphous silicon layer thickness is reduced in the channel zone, then current efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The amorphous silicon layer is designed with non-uniform thickness: it is thinner in the channel zone to improve current efficiency and thicker in other regions to maintain manufacturing robustness. The metal oxide semiconductor layer compensates for this variation, ensuring consistent electrical performance across the device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases current efficiency, reduces leakage current, and improves reliability by enabling ohmic contact formation between the metal and amorphous silicon layers, while the IGZO layer's defects help manage hole conduction, mitigating severe bending of the current curve and enhancing overall performance.
Implementation Method 1
the metal oxide semiconductor has a relatively low potential barrier with respect to a metal layer so as to make it possible to form an ohmic contact thereby increasing current efficiency
Implementation Method 2
the metal oxide semiconductor layer comprises numerous defects that trap holes so that during the operation of the TFT, even a great negative voltage is applied to the gate terminal to thus form a hole conducting channel, the holes may hardly move from the source/drain terminals through the metal oxide semiconductor layer
Data Source
AI summary
The present invention provides a TFT substrate structure and a manufacturing method thereof. A metal oxide semiconductor layer is formed on an amorphous silicon layer to replace an N-type heavily-doped layer. The potential barrier between the amorphous silicon layer and metal layer is relatively low, making it possible to form an ohmic contact and thus increasing current efficiency, without the need of doping other ions to form the N-type heavily-doped layer. Further, the metal oxide semiconductor layer comprises numerous defects that trap holes so that during the operation of the TFT, even a great negative voltage is applied to the gate terminal to thus form a hole conducting channel, the holes may hardly move from the source/drain terminals through the metal oxide semiconductor layer and the semiconductor layer to reach the conducting channel and consequently, the current leakage issue occurring in a hole conducting zone of a conventional TFT substrate structure can be improved and severe bending of the hole current curve and poor reliability are also improved.