TFT Substrate Negative Line Bridge Electrode Design
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Solution Overview
Problem
In OLED displays, the manufacturing process for active matrix is complex, and wire lifting issues during etching cause defects, especially at the boundary area where gate and data line metal layers overlap, leading to difficulties in applying normal voltage to the pixel due to the height difference and etchant flow through contact holes.
Innovation Solution
A thin film transistor substrate design with a negative line applying reverse voltage to the pixel electrode, a recovery transistor with a drain electrode overlapping the negative line, and a bridge electrode connecting them through a contact hole that avoids overlapping the boundary area, ensuring proper voltage application and reducing defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a contact hole is formed at the boundary area where gate line and data line metal layers overlap, then electrical connection is achieved, but wire lifting occurs due to etchant flow through the contact hole
Solution Approach 1:
The patent applies different properties to different regions: the protective layer thickness is increased specifically at the boundary area where gate line and data line overlap, while other areas maintain normal thickness. This localized modification prevents etchant penetration at the vulnerable boundary region without affecting other areas of the device.
Solution Approach 2:
The protective layer is formed with increased thickness at the boundary area before the contact hole formation step. This preliminary reinforcement of the protective layer prevents the subsequent etchant from causing wire lifting, addressing the problem before it occurs during the etching process.
2Device complexity
If a thin protective layer is formed at the boundary area to reduce height difference, then manufacturing complexity is reduced, but wire lifting is induced by etchant flow through contact holes
Solution Approach 1:
Instead of making the entire protective layer thin, the patent makes it thin only in non-critical areas and maintains increased thickness at the boundary area where contact holes are formed. This localized quality differentiation resolves the contradiction by providing structural simplicity where needed while ensuring reliability at critical locations.
3Reliability
If contact holes are formed to connect wires in TFTs, then electrical connectivity is improved, but pixel defects increase due to wire lifting at boundary areas
Solution Approach 1:
The protective layer thickness is selectively increased at boundary areas where contact holes are formed, while other areas maintain normal thickness. This localized reinforcement prevents wire lifting specifically at contact hole locations, enabling reliable electrical connectivity without increasing pixel defects.
Solution Approach 2:
The protective layer is pre-formed with increased thickness at boundary regions before contact hole formation. This preliminary action prevents etchant-induced wire lifting during subsequent processing, ensuring both electrical connectivity and manufacturing precision.
Data Source
AI summary
A TFT substrate with reduced pixel defect rate is presented. The TFT substrate includes a pixel electrode, a negative line to apply a reverse voltage to the pixel electrode, and a recovery transistor including a drain electrode overlapping a part of the negative line with a insulating layer disposed between the negative line and the drain electrode. A contact hole is formed on the negative line and the drain electrode, and a bridge electrode connects the negative line and the drain electrode through the contact hole.The thin film transistor substrate and a display apparatus presented herein protect a data line assembly metal layer and decrease pixel defect. An improved reverse voltage efficiency is applied to a pixel electrode to protect a drain electrode.